2026 Ramesh Harjani: Electronics and Electrical Engineering Researcher – H-Index, Publications & Awards

Discipline name	D-Index	World Ranking	Current World Ranking	National Ranking	Current National Ranking	Publications	Citations
Electronics and Electrical Engineering	38	4877	4680	1704	1593	305	6503

Research.com Recognitions

2006 - IEEE Fellow For contributions to the design and computer aided design (CAD) of analog and radio frequency circuits.

Overview

Ramesh Harjani is affiliated with the University of Minnesota in the United States. Their research primarily focuses on the field of engineering, with a strong emphasis on electrical and electronic engineering. Additional subfields of study include hardware and architecture, biomedical engineering, and atomic and molecular physics and optics.

Their work covers several main topics, including:

VLSI and FPGA Design Techniques
VLSI and Analog Circuit Testing
Low-power high-performance VLSI design
Advancements in Semiconductor Devices and Circuit Design
Analog and Mixed-Signal Circuit Design
Semiconductor materials and devices
Advancements in Photolithography Techniques

Frequent co-authors who have collaborated on multiple publications with Harjani include:

Sachin S. Sapatnekar
Meghna Madhusudan
Jitesh Poojary
Arvind Sharma
Jiang Hu

Harjani has published extensively in well-known venues, with several recurring publication sources such as:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
2022 Design, Automation & Test in Europe Conference & Exhibition (DATE)
2021 IEEE/ACM International Conference On Computer Aided Design (ICCAD)
ACM Transactions on Design Automation of Electronic Systems
IEEE Transactions on Circuits & Systems II Express Briefs

Recent papers authored by or involving Harjani highlight several specific areas of their research:

From Specification to Silicon: Towards Analog/Mixed-Signal Design Automation using Surrogate NN Models with Transfer Learning, 2021, 2021 IEEE/ACM International Conference On Computer Aided Design (ICCAD)
GNN-Based Hierarchical Annotation for Analog Circuits, 2023, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Performance-Aware Common-Centroid Placement and Routing of Transistor Arrays in Analog Circuits, 2021, 2021 IEEE/ACM International Conference On Computer Aided Design (ICCAD)
Common-Centroid Layout for Active and Passive Devices: A Review and the Road Ahead, 2022, 2022 27th Asia and South Pacific Design Automation Conference (ASP-DAC)
Constructive Placement and Routing for Common-Centroid Capacitor Arrays in Binary-Weighted and Split DACs, 2023, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Harjani has been recognized as an IEEE Fellow since 2006 for contributions to the design and computer-aided design (CAD) of analog and radio frequency circuits.

Best Publications

A High-Efficiency DC-DC Converter Using 2 nH Integrated Inductors

Josh Wibben;Ramesh Harjani

628
Citations
OASYS: a framework for analog circuit synthesis

R. Harjani;R.A. Rutenbar;L.R. Carley

585
Citations
Fully-Integrated On-Chip DC-DC Converter With a 450X Output Range

S. S. Kudva;R. Harjani

285
Citations
A low-power CMOS VGA for 50 Mb/s disk drive read channels

R. Harjani

284
Citations
Design of low-phase-noise CMOS ring oscillators

Liang Dai;R. Harjani

173
Citations
A Prototype Framework for Knowledge-Based Analog Circuit Synthesis

R. Harjani;R. A. Rutenbar;L. R. Carley

145
Citations
CMOS switched-op-amp-based sample-and-hold circuit

Liang Dai;R. Harjani

140
Citations
Partial positive feedback for gain enhancement of low-power CMOS OTAs

Rongtai Wang;Ramesh Harjani

129
Citations
A +18 dBm IIP3 LNA in 0.35 /spl mu/m CMOS

Yongwang Ding;R. Harjani

120
Citations
A Linearized, Low-Phase-Noise VCO-Based 25-GHz PLL With Autonomic Biasing

Bodhisatwa Sadhu;Mark A. Ferriss;Arun S. Natarajan;Soner Yaldiz

106
Citations
Design of High-Performance CMOS Voltage-Controlled Oscillators

Liang Dai;Ramesh Harjani

98
Citations
/spl Sigma/High-frequency LC VCO design using capacitive degeneration

Byunghoo Jung;R. Harjani

93
Citations
A high-efficiency CMOS +22-dBm linear power amplifier

Yongwang Ding;R. Harjani

91
Citations
Feasibility and performance region modeling of analog and digital circuits

Ramesh Harjani;Jianfeng Shao

80
Citations
An integrated low-voltage class AB CMOS OTA

R. Harjani;R. Heineke;Feng Wang

79
Citations
Analog/RF physical layer issues for UWB systems

R. Harjani;J. Harvey;R. Sainati

77
Citations
A CMOS 3.3-8.4 GHz wide tuning range, low phase noise LC VCO

Bodhisatwa Sadhu;Jaehyup Kim;Ramesh Harjani

73
Citations
FRC: a method for extending the resolution of Nyquist rate converters using oversampling

R. Harjani;T.A. Lee

72
Citations
Analysis and Design of a 5 GS/s Analog Charge-Domain FFT for an SDR Front-End in 65 nm CMOS

Bodhisatwa Sadhu;Martin Sturm;Brian M. Sadler;Ramesh Harjani

70
Citations
GANA: graph convolutional network based automated netlist annotation for analog circuits

Kishor Kunal;Tonmoy Dhar;Meghna Madhusudan;Jitesh Poojary

69
Citations
High-frequency LC VCO design using capacitive degeneration

Byunghoo Jung;Ramesh Harjani

68
Citations
INVITED: ALIGN – Open-Source Analog Layout Automation from the Ground Up

Kishor Kunal;Meghna Madhusudan;Arvind K. Sharma;Wenbin Xu

41
Citations
OASYS: a framework for analog circuit synthesis

R. Harjani

27
Citations

Frequent Co-Authors

Sachin S. Sapatnekar University of Minnesota

Rob A. Rutenbar University of Pittsburgh

Alberto Valdes-Garcia IBM (United States)

Larry Pileggi Carnegie Mellon University

Jean-Olivier Plouchart IBM (United States)

Brian M. Sadler United States Army Research Laboratory

L.R. Carley Carnegie Mellon University

Daniel J. Friedman IBM (United States)

Alexander V. Rylyakov Nokia (United States)

Jiang Hu Texas A&M University

External Links

Personal website of Ramesh Harjani Google Scholar page

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