2026 Jeyavijayan Rajendran: Electronics and Electrical Engineering Researcher – H-Index, Publications & Awards

Discipline name	D-Index	World Ranking	Current World Ranking	National Ranking	Current National Ranking	Publications	Citations
Computer Science	42	8309	8073	3562	3427	146	8536
Electronics and Electrical Engineering	42	4054	3892	1448	1353	146	8533

Overview

Jeyavijayan Rajendran is affiliated with Texas A&M University in the United States. Their research spans multiple domains within computer science, with a focus on hardware security, artificial intelligence, and signal processing.

The scientist's publication record includes contributions to highly specialized topics in computing and engineering. Their recent papers demonstrate diverse interests in security and hardware verification, including:

"(Security) Assertions by Large Language Models," 2024, IEEE Transactions on Information Forensics and Security
"TheHuzz: Instruction Fuzzing of Processors Using Golden-Reference Models for Finding Software-Exploitable Vulnerabilities," 2022, arXiv (Cornell University)
"Security of Cloud FPGAs: A Survey," 2020, arXiv (Cornell University)
"ATTRITION: Attacking Static Hardware Trojan Detection Techniques Using Reinforcement Learning," 2022, Proceedings of the 2022 ACM SIGSAC Conference on Computer and Communications Security
"DETERRENT," 2022, Proceedings of the 59th ACM/IEEE Design Automation Conference

Rajendran frequently publishes in prominent outlets such as:

arXiv (Cornell University)
IEEE Transactions on Information Forensics and Security
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
IEEE Design and Test
Proceedings of the 2022 ACM SIGSAC Conference on Computer and Communications Security

Their collaborative work includes repeated partnerships with several researchers, highlighting ongoing research teams and networks. Notable frequent co-authors are:

Vasudev Gohil
Rahul Kande
Ahmad-Reza Sadeghi
Satwik Patnaik
Ramesh Karri

In terms of research domains, Rajendran's contributions are primarily situated within computer science. They have a particular focus on these subfields:

Artificial Intelligence
Hardware and Architecture
Signal Processing
Electrical and Electronic Engineering
Computer Networks and Communications

Rajendran's main research topics include:

Physical Unclonable Functions (PUFs) and Hardware Security
Advanced Malware Detection Techniques
Adversarial Robustness in Machine Learning
Security and Verification in Computing
Integrated Circuits and Semiconductor Failure Analysis
Network Security and Intrusion Detection
Neuroscience and Neural Engineering

Best Publications

Trustworthy Hardware: Identifying and Classifying Hardware Trojans

R Karri;J Rajendran;K Rosenfeld;M Tehranipoor

655
Citations
Security analysis of logic obfuscation

Jeyavijayan Rajendran;Youngok Pino;Ozgur Sinanoglu;Ramesh Karri

578
Citations
Fault Analysis-Based Logic Encryption

Jeyavijayan Rajendran;Huan Zhang;Chi Zhang;Garrett S. Rose

513
Citations
Security analysis of integrated circuit camouflaging

Jeyavijayan Rajendran;Michael Sam;Ozgur Sinanoglu;Ramesh Karri

494
Citations
SARLock: SAT attack resistant logic locking

Muhammad Yasin;Bodhisatwa Mazumdar;Jeyavijayan J V Rajendran;Ozgur Sinanoglu

446
Citations
On Improving the Security of Logic Locking

Muhammad Yasin;Jeyavijayan Jv Rajendran;Ozgur Sinanoglu;Ramesh Karri

373
Citations
Provably-Secure Logic Locking: From Theory To Practice

Muhammad Yasin;Abhrajit Sengupta;Mohammed Thari Nabeel;Mohammed Ashraf

368
Citations
Removal Attacks on Logic Locking and Camouflaging Techniques

Muhammad Yasin;Bodhisatwa Mazumdar;Ozgur Sinanoglu;Jeyavijayan Rajendran

273
Citations
Is split manufacturing secure

Jeyavijayan Rajendran;Ozgur Sinanoglu;Ramesh Karri

224
Citations
Security analysis of Anti-SAT

Muhammad Yasin;Bodhisatwa Mazumdar;Ozgur Sinanoglu;Jeyavijayan Rajendran

172
Citations
Logic encryption: a fault analysis perspective

Jeyavijayan Rajendran;Youngok Pino;Ozgur Sinanoglu;Ramesh Karri

161
Citations
Detecting malicious modifications of data in third-party intellectual property cores

Jeyavijayan Rajendran;Vivekananda Vedula;Ramesh Karri

155
Citations
Leveraging Memristive Systems in the Construction of Digital Logic Circuits

G. S. Rose;J. Rajendran;H. Manem;R. Karri

154
Citations
Shielding Heterogeneous MPSoCs From Untrustworthy 3PIPs Through Security- Driven Task Scheduling

Chen Liu;Jeyavijayan Rajendran;Chengmo Yang;Ramesh Karri

151
Citations
Hardware security: threat models and metrics

M. Rostami;F. Koushanfar;J. Rajendran;R. Karri

149
Citations
Sneak-Path Testing of Crossbar-Based Nonvolatile Random Access Memories

Sachhidh Kannan;Jeyavijayan Rajendran;Ramesh Karri;Ozgur Sinanoglu

140
Citations
Trustworthy Hardware: Trojan Detection and Design-for-Trust Challenges

M. Tehranipoor;H. Salmani;Xuehui Zhang;Xiaoxiao Wang

139
Citations
Nano Meets Security: Exploring Nanoelectronic Devices for Security Applications

Jeyavijayan Rajendran;Ramesh Karri;James B. Wendt;Miodrag Potkonjak

132
Citations
Nano-PPUF: A Memristor-Based Security Primitive

Jeyavijayan Rajendran;Garrett S. Rose;Ramesh Karri;Miodrag Potkonjak

129
Citations
What to Lock?: Functional and Parametric Locking

Muhammad Yasin;Abhrajit Sengupta;Benjamin Carrion Schafer;Yiorgos Makris

120
Citations

Frequent Co-Authors

Ramesh Karri New York University

Garrett S. Rose University of Tennessee at Knoxville

Jiang Hu Texas A&M University

Miodrag Potkonjak University of California, Los Angeles

Yiorgos Makris The University of Texas at Dallas

Edgar Sanchez-Sinencio Texas A&M University

Ankur Srivastava University of Maryland, College Park

Farinaz Koushanfar University of California, San Diego

Qing Wu United States Air Force Research Laboratory

Swarup Bhunia University of Florida

External Links

Google Scholar page

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