The scientist’s investigation covers issues in Decoding methods, Turbo code, Embedded system, Low-density parity-check code and Throughput. His Decoding methods study combines topics in areas such as Computer hardware, Electronic engineering, Communication channel and Computer engineering. As a member of one scientific family, Norbert Wehn mostly works in the field of Turbo code, focusing on Forward error correction and, on occasion, Real-time computing.
His Embedded system study incorporates themes from Dram, CMOS and Fault tolerance. His research in Low-density parity-check code intersects with topics in Fixed point, WiMAX, BCH code and Parity bit. His Channel code research focuses on Wireless and how it connects with Register-transfer level.
His main research concerns Embedded system, Decoding methods, Electronic engineering, Turbo code and Dram. His Embedded system study combines topics from a wide range of disciplines, such as Energy consumption, Software and Efficient energy use. His work on Low-density parity-check code as part of general Decoding methods research is frequently linked to Throughput, thereby connecting diverse disciplines of science.
His studies deal with areas such as Wireless and Electrical engineering as well as Electronic engineering. In his research, Turbo equalizer is intimately related to Serial concatenated convolutional codes, which falls under the overarching field of Turbo code. His Dram research includes themes of Dynamic random-access memory, Random access memory, CAS latency, Memory controller and Random access.
The scientist’s investigation covers issues in Embedded system, Dram, Decoding methods, Field-programmable gate array and Throughput. His Embedded system research is multidisciplinary, incorporating perspectives in Energy consumption, Software, Memory controller, Concurrency and Scheduling. His study in Dram is interdisciplinary in nature, drawing from both Dynamic random-access memory, Random access memory, Random access, Memory bandwidth and Efficient energy use.
His Decoding methods study focuses on Turbo code in particular. His Turbo code research focuses on Parallel computing and how it relates to Latency. He works mostly in the field of Field-programmable gate array, limiting it down to topics relating to Hardware architecture and, in certain cases, Optical character recognition, Computer hardware, MNIST database, Artificial intelligence and Deep learning, as a part of the same area of interest.
Norbert Wehn mainly investigates Dram, Embedded system, Field-programmable gate array, Artificial neural network and Throughput. Norbert Wehn conducts interdisciplinary study in the fields of Embedded system and Data integrity through his works. Norbert Wehn merges many fields, such as Throughput and Computer engineering, in his writings.
His biological study deals with issues like Communication channel, which deal with fields such as Electronic engineering. He focuses mostly in the field of Parallel computing, narrowing it down to matters related to Forward error correction and, in some cases, Turbo code. His research in Baseband intersects with topics in Decoding methods and Energy.
This overview was generated by a machine learning system which analysed the scientist’s body of work. If you have any feedback, you can contact us here.
Reliable on-chip systems in the nano-era: lessons learnt and future trends
Jorg Henkel;Lars Bauer;Nikil Dutt;Puneet Gupta.
design automation conference (2013)
Turbo-decoding without SNR estimation
A. Worm;P. Hoeher;N. Wehn.
IEEE Communications Letters (2000)
A Synthesizable IP Core for DVB-S2 LDPC Code Decoding
Frank Kienle;Torben Brack;Norbert Wehn.
design, automation, and test in europe (2005)
A Synthesizable IP Core for WIMAX 802.16E LDPC Code Decoding
Torben Brack;Matthias Alles;Frank Kienle;Norbert Wehn.
personal, indoor and mobile radio communications (2006)
A 477mW NoC-based digital baseband for MIMO 4G SDR
Fabien Clermidy;Christian Bernard;Romain Lemaire;Jerome Martin.
international solid-state circuits conference (2010)
Low complexity LDPC code decoders for next generation standards
T. Brack;M. Alles;T. Lehnigk-Emden;F. Kienle.
design, automation, and test in europe (2007)
Automating RT-level operand isolation to minimize power consumption in datapaths
M. Munch;B. Wurth;R. Mehra;J. Sproch.
design, automation, and test in europe (2000)
Design and architectures for dependable embedded systems
Jörg Henkel;Lars Bauer;Joachim Becker;Oliver Bringmann.
international conference on hardware/software codesign and system synthesis (2011)
Network-on-chip-centric approach to interleaving in high throughput channel decoders
C. Neeb;M.J. Thul;N. Wehn.
international symposium on circuits and systems (2005)
A 150Mbit/s 3GPP LTE turbo code decoder
Matthias May;Thomas Ilnseher;Norbert Wehn;Wolfgang Raab.
design, automation, and test in europe (2010)
Profile was last updated on December 6th, 2021.
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