Embedded system, Scheduling, Parallel computing, Interleaved memory and Computer memory are his primary areas of study. His Embedded system research includes themes of Chip, Software, Operating system and Computer hardware. His biological study focuses on Dynamic priority scheduling.
The concepts of his Dynamic priority scheduling study are interwoven with issues in Energy consumption, Dynamic voltage scaling and Fair-share scheduling. His Parallel computing research incorporates elements of Algorithm, Node and Control flow graph. The various areas that he examines in his Computer memory study include Registered memory and Memory map.
His scientific interests lie mostly in Parallel computing, Scheduling, Embedded system, Distributed computing and Retiming. His Parallel computing research includes elements of Interleaved memory, Digital signal processing, Loop scheduling and Uniform memory access. Edwin H.-M. Sha has included themes like Schedule and Mathematical optimization in his Scheduling study.
His study in Mathematical optimization is interdisciplinary in nature, drawing from both Probabilistic logic and Real-time computing. His work carried out in the field of Embedded system brings together such families of science as Energy consumption, Non-volatile memory, Software and Dram. His research integrates issues of Data flow diagram and Software pipelining in his study of Retiming.
The scientist’s investigation covers issues in Embedded system, Scheduling, Parallel computing, Distributed computing and Energy consumption. His study in the fields of Wear leveling under the domain of Embedded system overlaps with other disciplines such as Phase-change memory. His Scheduling study combines topics from a wide range of disciplines, such as Multiprocessing, MPSoC and Schedule.
As a member of one scientific family, he mostly works in the field of Parallel computing, focusing on Access time and, on occasion, Static random-access memory. His Distributed computing study integrates concerns from other disciplines, such as Real-time computing, Computer network, Integer programming and Routing protocol. His studies deal with areas such as Least slack time scheduling, Efficient energy use and Mobile device as well as Energy consumption.
His primary scientific interests are in Embedded system, Phase-change memory, Wear leveling, Computer network and Parallel computing. His Embedded system research is multidisciplinary, incorporating elements of Overhead, Operating system, Energy consumption, Chip and Non-volatile memory. The Energy consumption study combines topics in areas such as Scheduling, Efficient energy use and Paging.
His Parallel computing study combines topics in areas such as Processor scheduling, Greedy algorithm, Dynamic priority scheduling and Heuristic. His Routing protocol research is multidisciplinary, incorporating perspectives in Mobile ad hoc network and Distributed computing. His work on Computer memory, Non-volatile random-access memory, Registered memory and Semiconductor memory is typically connected to Nand flash memory as part of general Computer hardware study, connecting several disciplines of science.
This overview was generated by a machine learning system which analysed the scientist’s body of work. If you have any feedback, you can contact us here.
A novel multiplexer-based low-power full adder
Yingtao Jiang;A. Al-Sheraidah;Yuke Wang;E. Sha.
IEEE Transactions on Circuits and Systems Ii-express Briefs (2004)
Cost minimization while satisfying hard/soft timing constraints for heterogeneous embedded systems
Meikang Qiu;Edwin H. M. Sha.
ACM Transactions on Design Automation of Electronic Systems (2009)
Trust prediction and trust-based source routing in mobile ad hoc networks
Hui Xia;Zhiping Jia;Xin Li;Lei Ju.
ad hoc networks (2013)
Rotation scheduling: a loop pipelining algorithm
Liang-Fang Chao;A.S. LaPaugh;E.H.-M. Sha.
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (1997)
Reducing write activities on non-volatile memories in embedded CMPs via data migration and recomputation
Jingtong Hu;Chun Jason Xue;Wei-Che Tseng;Yi He.
design automation conference (2010)
crowddeliver : Planning City-Wide Package Delivery Paths Leveraging the Crowd of Taxis
Chao Chen;Daqing Zhang;Xiaojuan Ma;Bin Guo.
IEEE Transactions on Intelligent Transportation Systems (2017)
Towards energy efficient hybrid on-chip Scratch Pad Memory with non-volatile memory
Jingtong Hu;Chun Jason Xue;Qingfeng Zhuge;Wei-Che Tseng.
design, automation, and test in europe (2011)
Energy minimization with loop fusion and multi-functional-unit scheduling for multidimensional DSP
Meikang Qiu;Edwin H. M. Sha;Meilin Liu;Man Lin.
Journal of Parallel and Distributed Computing (2008)
Security protection and checking for embedded system integration against buffer overflow attacks via hardware/software
Zili Shao;C. Xue;Q. Zhuge;M. Qiu.
IEEE Transactions on Computers (2006)
Voltage Assignment with Guaranteed Probability Satisfying Timing Constraint for Real-time Multiproceesor DSP
Meikang Qiu;Zhiping Jia;Chun Xue;Zili Shao.
signal processing systems (2007)
If you think any of the details on this page are incorrect, let us know.
We appreciate your kind effort to assist us to improve this page, it would be helpful providing us with as much detail as possible in the text box below: