2012 - ACM Senior Member
2011 - IEEE Fellow For contributions to design optimization for signal processing
Shuvra S. Bhattacharyya mostly deals with Dataflow, Scheduling, Parallel computing, Digital signal processing and Dataflow architecture. His biological study spans a wide range of topics, including Data flow diagram, Computer architecture, Software and Implementation. As part of the same scientific family, Shuvra S. Bhattacharyya usually focuses on Implementation, concentrating on Embedded system and intersecting with Compiler.
His Scheduling study combines topics from a wide range of disciplines, such as Multiprocessing, Schedule, Distributed computing and Signal processing. His research in Parallel computing intersects with topics in Model of computation, Graph, Design space exploration and Metamodeling. The Digital signal processing study combines topics in areas such as Block diagram and Digital signal processor.
Shuvra S. Bhattacharyya mostly deals with Dataflow, Parallel computing, Digital signal processing, Scheduling and Embedded system. The various areas that Shuvra S. Bhattacharyya examines in his Dataflow study include Computer architecture, Software and Signal processing. The concepts of his Parallel computing study are interwoven with issues in Data flow diagram, Graph and Compiler.
His Digital signal processing research includes themes of Field-programmable gate array, Schedule, Computation and Digital signal processor. He has researched Scheduling in several fields, including Distributed computing and Implementation. His Embedded system research is multidisciplinary, incorporating elements of Energy consumption, Computer hardware and Embedded software.
His primary areas of study are Dataflow, Distributed computing, Artificial intelligence, Parallel computing and Computer architecture. His Dataflow study combines topics in areas such as Model of computation, Computation, Signal processing, Scheduling and Multi-core processor. His studies in Model of computation integrate themes in fields like Dataflow architecture, Embedded system and Software design.
His work deals with themes such as Systems design and MPSoC, which intersect with Distributed computing. His study in Parallel computing is interdisciplinary in nature, drawing from both Digital signal processing and Graphics. His research in Computer architecture focuses on subjects like Software, which are connected to Design flow.
Shuvra S. Bhattacharyya focuses on Dataflow, Artificial intelligence, Signal processing, Computer architecture and Parallel computing. His studies deal with areas such as Distributed computing, Application programming interface, Model of computation, Scheduling and Multi-core processor as well as Dataflow. His biological study spans a wide range of topics, including Wireless network and Implementation.
Shuvra S. Bhattacharyya has included themes like Computer vision and Pattern recognition in his Artificial intelligence study. In his work, Hardware description language and Programming paradigm is strongly intertwined with Software, which is a subfield of Computer architecture. His research investigates the link between Parallel computing and topics such as Graphics that cross with problems in Orthogonal frequency-division multiplexing, Digital signal processing and Wireless.
This overview was generated by a machine learning system which analysed the scientist’s body of work. If you have any feedback, you can contact us here.
Embedded Multiprocessors: Scheduling and Synchronization
Sundararajan Sriram;Shuvra S. Bhattacharyya.
Parameterized dataflow modeling for DSP systems
B. Bhattacharya;S.S. Bhattacharyya.
IEEE Transactions on Signal Processing (2001)
Synthesis of Embedded Software from Synchronous Dataflow Specifications
Shuvra S. Bhattacharyya;Praveen K. Murthy;Edward A. Lee.
signal processing systems (1999)
Handbook of Signal Processing Systems
Shuvra S. Bhattacharyya;Ed F. Deprettere;Rainer Leupers;Jarmo Takala.
Heterogeneous Concurrent Modeling and Design in Java (Volume 1: Introduction to Ptolemy II)
Christopher Brooks;Edward A Lee;Xiaojun Liu;Stephen Neuendorffer.
Functional DIF for Rapid Prototyping
W. Plishker;N. Sane;M. Kiemb;K. Anand.
rapid system prototyping (2008)
Gabriel: a design environment for DSP
E.A. Lee;W.-H. Ho;E.E. Goei;J.C. Bier.
IEEE Transactions on Acoustics, Speech, and Signal Processing (1989)
Software synthesis from the dataflow interchange format
Chia-Jui Hsu;Ming-Yung Ko;Shuvra S. Bhattacharyya.
software and compilers for embedded systems (2005)
OpenDF: a dataflow toolset for reconfigurable hardware and multicore systems
Shuvra S. Bhattacharyya;Gordon Brebner;Jörn W. Janneck;Johan Eker.
ACM Sigarch Computer Architecture News (2009)
Overview of the MPEG Reconfigurable Video Coding Framework
Shuvra S. Bhattacharyya;Johan Eker;Jörn W. Janneck;Christophe Lucarz.
signal processing systems (2011)
Profile was last updated on December 6th, 2021.
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