2016 - ACM Fellow For contributions to software prefetching and thread-level speculation.
1999 - Fellow of Alfred P. Sloan Foundation
The scientist’s investigation covers issues in Parallel computing, Compiler, Cache, Instruction prefetch and Multiprocessing. The Parallel computing study combines topics in areas such as Dram, Computer hardware and Pointer. His Compiler research is multidisciplinary, relying on both Multithreading, Speculative multithreading and Programmer.
His Cache and Cache algorithms, Cache invalidation, Cache coloring, Cache pollution and Smart Cache investigations all form part of his Cache research activities. His work deals with themes such as Rewriting, Data mining, Linked list, Data access and Preprocessor, which intersect with Instruction prefetch. In his research, Work stealing and Latency is intimately related to Distributed computing, which falls under the overarching field of Multiprocessing.
Todd C. Mowry mainly investigates Parallel computing, Cache, Compiler, CPU cache and Distributed computing. His Parallel computing research incorporates themes from Computer hardware, Thread and Speculative multithreading. His work carried out in the field of Cache brings together such families of science as Bottleneck, Latency and Database.
His work on Optimizing compiler as part of general Compiler study is frequently connected to CAS latency, therefore bridging the gap between diverse disciplines of science and establishing a new relationship between them. His CPU cache research integrates issues from Interleaved memory, Page fault, Data structure and Pointer. The various areas that he examines in his Cache coloring study include Page cache and Cache pollution.
His scientific interests lie mostly in Parallel computing, Cache, Computer hardware, Memory bandwidth and Efficient energy use. His studies deal with areas such as Dram, Page table, Compiler and Table as well as Parallel computing. His research in Compiler focuses on subjects like Inference, which are connected to Latency and Recursion.
His work in Cache coloring and CPU cache are all subfields of Cache research. Within one scientific family, Todd C. Mowry focuses on topics pertaining to Metadata under Computer hardware, and may sometimes address concerns connected to Scalability. His Memory bandwidth research is multidisciplinary, incorporating elements of Idle and Speedup.
His main research concerns Parallel computing, Computer hardware, Dram, Cache and Memory bandwidth. His Thread research extends to Parallel computing, which is thematically connected. His work in Computer hardware tackles topics such as Metadata which are related to areas like Scalability and Effective method.
His Dram research focuses on Bitwise operation and how it relates to Hybrid Memory Cube and Hardware acceleration. His study in Least frequently used, Page cache, Cache invalidation, Cache pollution and Cache algorithms is carried out as part of his Cache studies. As part of one scientific family, he deals mainly with the area of Memory bandwidth, narrowing it down to issues related to the SIMD, and often Data structure, Physical address and CPU cache.
Design and evaluation of a compiler algorithm for prefetching
Todd C. Mowry;Monica S. Lam;Anoop Gupta.
architectural support for programming languages and operating systems (1992)
Compiler-based prefetching for recursive data structures
Chi-Keung Luk;Todd C. Mowry.
architectural support for programming languages and operating systems (1996)
A scalable approach to thread-level speculation
J. Greggory Steffan;Christopher B. Colohan;Antonia Zhai;Todd C. Mowry.
international symposium on computer architecture (2000)
The potential for using thread-level data speculation to facilitate automatic parallelization
J.G. Steffan;T.C. Mowry.
high-performance computer architecture (1998)
Tolerating latency through software-controlled prefetching in shared-memory multiprocessors
Todd Mowry;Anoop Gupta.
Journal of Parallel and Distributed Computing (1991)
Reducing Memory and Traffic Requirements for Scalable Directory-Based Cache Coherence Schemes*
Anoop Gupta;Wolf-Dietrich Weber;Todd C. Mowry.
international conference on parallel processing (1992)
Base-delta-immediate compression: practical data compression for on-chip caches
Gennady Pekhimenko;Vivek Seshadri;Onur Mutlu;Michael A. Kozuch.
international conference on parallel architectures and compilation techniques (2012)
S.C. Goldstein;J.D. Campbell;T.C. Mowry.
IEEE Computer (2005)
Tolerating latency through software-controlled data prefetching
Todd Carl Mowry.
RowClone: fast and energy-efficient in-DRAM bulk data copy and initialization
Vivek Seshadri;Yoongu Kim;Chris Fallin;Donghyuk Lee.
international symposium on microarchitecture (2013)
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