His primary areas of study are Embedded system, Parallel computing, Phase-change memory, Computer hardware and Memory architecture. The Embedded system study combines topics in areas such as Schedule, Chip, Low-power electronics, Network processor and Scheduling. His Cache pollution and Cache study, which is part of a larger body of work in Parallel computing, is frequently linked to Small number and Set, bridging the gap between disciplines.
Combining a variety of fields, including Phase-change memory, Dram, Non-volatile memory and Scalability, are what the author presents in his essays. His Dram study deals with Wear leveling intersecting with Interleaved memory, Non-volatile random-access memory, Semiconductor memory, Dynamic random-access memory and Memory refresh. His work carried out in the field of Computer hardware brings together such families of science as Overhead and Reduction.
Jun Yang spends much of his time researching Embedded system, Parallel computing, Computer hardware, Cache and Dram. His Embedded system research incorporates themes from Schedule, Chip, Network processor, Static random-access memory and Efficient energy use. His biological study spans a wide range of topics, including Energy consumption, Scheduling, Memory controller and Encoding.
His work on Non-volatile memory as part of general Computer hardware research is frequently linked to Phase-change memory, bridging the gap between disciplines. His Cache study combines topics from a wide range of disciplines, such as Magnetoresistive random-access memory and Instruction set. His Dram research includes elements of Dynamic random-access memory, Random access memory, Backup, Wear leveling and Bitwise operation.
Jun Yang mainly investigates Latency, Parallel computing, Dram, Computer hardware and Embedded system. His research investigates the link between Latency and topics such as Context switch that cross with problems in Kernel. Jun Yang has included themes like Lookup table and Leverage in his Parallel computing study.
His Dram study combines topics in areas such as Overhead, Energy consumption, Charge sharing, Memory protection and Bitwise operation. His Computer hardware research is multidisciplinary, relying on both Resistive random-access memory, Scalability, Working set and Speedup. The study incorporates disciplines such as General-purpose computing on graphics processing units, Logic gate and Static random-access memory in addition to Embedded system.
Jun Yang mostly deals with Dram, Flash memory, Embedded system, Random access memory and Overhead. His research integrates issues of Energy consumption, Lookup table, Bitwise operation and Leverage in his study of Dram. His study in the field of Wear leveling is also linked to topics like Garbage collection.
His study in Overhead is interdisciplinary in nature, drawing from both Power network design, Electrical engineering, Crossbar switch and Resistive random-access memory. His Scheduling research incorporates elements of Computer hardware and Latency. His work in Computer hardware addresses subjects such as Data migration, which are connected to disciplines such as Page fault.
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A durable and energy efficient main memory using phase change memory technology
Ping Zhou;Bo Zhao;Jun Yang;Youtao Zhang.
international symposium on computer architecture (2009)
Phase-Change Technology and the Future of Main Memory
B.C. Lee;Ping Zhou;Jun Yang;Youtao Zhang.
IEEE Micro (2010)
Energy reduction for STT-RAM using early write termination
Ping Zhou;Bo Zhao;Jun Yang;Youtao Zhang.
international conference on computer aided design (2009)
Frequent value compression in data caches
Jun Yang;Youtao Zhang;Rajiv Gupta.
international symposium on microarchitecture (2000)
Frequent value locality and value-centric data cache design
Youtao Zhang;Jun Yang;Rajiv Gupta.
architectural support for programming languages and operating systems (2000)
Fast secure processor for inhibiting software piracy and tampering
Jun Yang;Youtao Zhang;Lan Gao.
international symposium on microarchitecture (2003)
Improving write operations in MLC phase change memory
Lei Jiang;Bo Zhao;Youtao Zhang;Jun Yang.
high performance computer architecture (2012)
Dynamic Thermal Management through Task Scheduling
Jun Yang;Xiuyi Zhou;M. Chrobak;Youtao Zhang.
international symposium on performance analysis of systems and software (2008)
A Way-Halting Cache for Low-Energy High-Performance Systems
Chuanjun Zhang;F. Vahid;Jun Yang;W. Walid.
IEEE Computer Architecture Letters (2003)
A way-halting cache for low-energy high-performance systems
Chuanjun Zhang;Frank Vahid;Jun Yang;Walid Najjar.
ACM Transactions on Architecture and Code Optimization (2005)
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