World's Best Scientists 2026 revealed!

D-Index & Metrics

Computer Science

D-Index
40
Citations
6028
World Ranking
9372
National Ranking
3974

Electronics and Electrical Engineering

D-Index
38
Citations
5626
World Ranking
4937
National Ranking
1718

Research.com Recognitions

  • 2015 - ACM Distinguished Member
  • 2014 - ACM Senior Member
  • 2009 - Fellow of the American Association for the Advancement of Science (AAAS)
  • 2007 - IEEE Fellow For contributions to dataflow and reconfigurable computing architectures

Overview

Walid Najjar is affiliated with the University of California, Riverside in the United States. Their primary research area falls within Computer Science, with a significant focus on several subfields including Hardware and Architecture, Computer Networks and Communications, Computational Theory and Mathematics, Electrical and Electronic Engineering, and Computer Vision and Pattern Recognition.

Their recent published works reflect these interests and cover a variety of topics related to high-performance and parallel computing. Notable papers include:

  • Field Programmable Gate Arrays for Enhancing the Speed and Energy Efficiency of Quantum Dynamics Simulations, 2020, Journal of Chemical Theory and Computation
  • Acceleration of Parallel-Blocked QR Decomposition of Tall-and-Skinny Matrices on FPGAs, 2021, ACM Transactions on Architecture and Code Optimization
  • Efficient local locking for massively multithreaded in-memory hash-based operators, 2021, The VLDB Journal

The main topics covered in their work include:

  • Parallel Computing and Optimization Techniques
  • Advanced Data Storage Technologies
  • Low-power high-performance VLSI design
  • Matrix Theory and Algorithms
  • Numerical Methods and Algorithms
  • Caching and Content Delivery
  • Advanced Image and Video Retrieval Techniques

Walid Najjar has collaborated frequently with several co-authors, which include:

  • José M. Rodríquez-Borbón
  • Bryan M. Wong
  • Amin Kalantar
  • Sharma S. R. K. C. Yamijala
  • M. Belén Oviedo

Their publications have appeared in respected venues such as the Journal of Chemical Theory and Computation, ACM Transactions on Architecture and Code Optimization, and The VLDB Journal.

Najjar's contributions to the field have been recognized through various awards and honors. These include being named an ACM Distinguished Member in 2015 and ACM Senior Member in 2014. They were also awarded the title of Fellow of the American Association for the Advancement of Science (AAAS) in 2009. Additionally, they were named an IEEE Fellow in 2007 for their contributions to dataflow and reconfigurable computing architectures.

Best Publications

  • A highly configurable cache architecture for embedded systems

    Chuanjun Zhang;Frank Vahid;Walid Najjar

  • Network resilience: a measure of network fault tolerance

    W. Najjar;J.-L. Gaudiot

  • Designing Modular Hardware Accelerators in C with ROCCC 2.0

    Jason Villarreal;Adrian Park;Walid Najjar;Robert Halstead

  • Compiling PCRE to FPGA for accelerating SNORT IDS

    Abhishek Mitra;Walid Najjar;Laxmi Bhuyan

  • A quantitative analysis of the speedup factors of FPGAs over processors

    Zhi Guo;Walid Najjar;Frank Vahid;Kees Vissers

  • Microhash: an efficient index structure for fash-based sensor devices

    Demetrios Zeinalipour-Yazti;Song Lin;Vana Kalogeraki;Dimitrios Gunopulos

  • Accelerating Dynamic Time Warping Subsequence Search with GPUs and FPGAs

    Doruk Sart;Abdullah Mueen;Walid Najjar;Eamonn Keogh

  • High-level language abstraction for reconfigurable computing

    W.A. Najjar;W. Bohm;B.A. Draper;J. Hammes

  • A Way-Halting Cache for Low-Energy High-Performance Systems

    Chuanjun Zhang;F. Vahid;Jun Yang;W. Walid

  • A way-halting cache for low-energy high-performance systems

    Chuanjun Zhang;Frank Vahid;Jun Yang;Walid Najjar

  • A way-halting cache for low-energy high-performance systems

    Chuanjun Zhang;Frank Vahid;Jun Yang;Walid Najjar

  • Advances in the dataflow computational model

    Walid A. Najjar;Edward A. Lee;Guang R. Gao

  • Optimized Generation of Data-Path from C Codes for FPGAs

    Zhi Guo;Betul Buyukkurt;Walid Najjar;Kees Vissers

  • Cameron: high level language compilation for reconfigurable systems

    Jeff Hammes;Bob Rinker;Wim Bohm;Walid Najjar

  • A highly configurable cache for low energy embedded systems

    Chuanjun Zhang;Frank Vahid;Walid Najjar

  • Mapping a Single Assignment Programming Language to Reconfigurable Systems

    W. Böhm;J. Hammes;B. Draper;M. Chawathe

  • Input data reuse in compiling window operations onto reconfigurable hardware

    Zhi Guo;Betul Buyukkurt;Walid Najjar

  • Profiling tools for hardware/software partitioning of embedded applications

    Dinesh C. Suresh;Walid A. Najjar;Frank Vahid;Jason R. Villarreal

  • Efficient hardware code generation for FPGAs

    Zhi Guo;Walid Najjar;Betul Buyukkurt

  • Impact of Loop Unrolling on Area, Throughput and Clock Frequency in ROCCC : C to VHDL Compiler for FPGAs

    Betul Buyukkurt;Zhi Guo;Walid A. Najjar

Frequent Co-Authors

Vassilis J. Tsotras
Vassilis J. Tsotras University of California, Riverside
Frank Vahid
Frank Vahid University of California, Riverside
Bruce A. Draper
Bruce A. Draper Colorado State University
Jun Yang
Jun Yang University of Pittsburgh
Pradip K. Srimani
Pradip K. Srimani Clemson University
Vana Kalogeraki
Vana Kalogeraki Athens University of Economics and Business
Dimitrios Gunopulos
Dimitrios Gunopulos National and Kapodistrian University of Athens
Fadi J. Kurdahi
Fadi J. Kurdahi University of California, Irvine
Stefano Lonardi
Stefano Lonardi University of California, Riverside
Amit K. Roy-Chowdhury
Amit K. Roy-Chowdhury University of California, Riverside

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