2000 - IEEE Fellow For contributions to innovative techniques for testing and synthesis of electronic circuits.
His primary scientific interests are in Algorithm, Electronic circuit, Automatic test pattern generation, Electronic engineering and Fault coverage. His studies in Algorithm integrate themes in fields like Set and Benchmark. As part of the same scientific family, Kwang-Ting Cheng usually focuses on Electronic circuit, concentrating on Redundancy and intersecting with Logic gate.
His work investigates the relationship between Automatic test pattern generation and topics such as Scan chain that intersect with problems in Boundary scan. His Fault coverage study also includes
Kwang-Ting Cheng mainly investigates Algorithm, Electronic engineering, Automatic test pattern generation, Electronic circuit and Artificial intelligence. His Algorithm study combines topics in areas such as Fault and Set. His Electronic engineering research includes elements of Transistor and Electrical engineering.
His Automatic test pattern generation research is multidisciplinary, incorporating elements of Theoretical computer science, Boolean satisfiability problem, Computer engineering and Fault coverage. His work deals with themes such as Redundancy, Very-large-scale integration, Logic gate and Benchmark, which intersect with Electronic circuit. He interconnects Machine learning, Computer vision and Pattern recognition in the investigation of issues within Artificial intelligence.
Kwang-Ting Cheng focuses on Artificial intelligence, Pattern recognition, Convolutional neural network, Transistor and Artificial neural network. His biological study spans a wide range of topics, including Machine learning and Computer vision. Kwang-Ting Cheng has researched Pattern recognition in several fields, including Overfitting and Sensitivity.
His work in Transistor addresses issues such as Thin-film transistor, which are connected to fields such as Carbon nanotube, Electronic circuit and Semiconductor device modeling. In his research, Algorithm is intimately related to Block, which falls under the overarching field of Sign function. As part of one scientific family, Kwang-Ting Cheng deals mainly with the area of Algorithm, narrowing it down to issues related to the Distribution, and often Code.
Kwang-Ting Cheng mostly deals with Artificial intelligence, Convolutional neural network, Computer vision, Pattern recognition and Artificial neural network. Artificial intelligence is frequently linked to Set in his study. His research integrates issues of Cinematography, Mobile device and Robustness in his study of Computer vision.
His work on Feature extraction as part of general Pattern recognition study is frequently linked to Modalities, therefore connecting diverse disciplines of science. He usually deals with Convolution and limits it to topics linked to Sign function and Function, Block, Algorithm, Network performance and Initialization. His Algorithm research incorporates themes from Margin, Distribution, Construct, Generalized function and Sign.
This overview was generated by a machine learning system which analysed the scientist’s body of work. If you have any feedback, you can contact us here.
Fast Human Detection Using a Cascade of Histograms of Oriented Gradients
Qiang Zhu;Mei-Chen Yeh;Kwang-Ting Cheng;S. Avidan.
computer vision and pattern recognition (2006)
A partial scan method for sequential circuits with feedback
K.-T. Cheng;V.D. Agrawal.
IEEE Transactions on Computers (1990)
Delay fault testing for VLSI circuits
Angela Krstić;Kwang-Ting Cheng.
(1998)
Automatic Functional Test Generation Using The Extended Finite State Machine Model
Kwang Ting Cheng;A. S. Krishnakumar.
design automation conference (1993)
Electronic Design Automation: Synthesis, Verification, and Test
Laung-Terng Wang;Yao-Wen Chang;Kwang-Ting (Tim) Cheng.
Published in <b>2009</b> in Burlington by Morgan Kaufmann (2009)
Automatic generation of functional vectors using the extended finite state machine model
Kwang-Ting Cheng;A. S. Krishnakumar.
ACM Transactions on Design Automation of Electronic Systems (1996)
Classification and identification of nonrobust untestable path delay faults
K.-T. Cheng;H.-C. Chen.
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (1996)
A BIST scheme for on-chip ADC and DAC testing
Jiun-Lang Huang;Chee-Kian Ong;Kwang-Ting Cheng.
design, automation, and test in europe (2000)
Biocompatible and totally disintegrable semiconducting polymer for ultrathin and ultralightweight transient electronics
Ting Lei;Ming Guan;Jia Liu;Hung-Cheng Lin.
Proceedings of the National Academy of Sciences of the United States of America (2017)
False-path-aware statistical timing analysis and efficient path selection for delay testing and timing validation
Jing-Jia Liou;Angela Krstic;Li-C. Wang;Kwang-Ting Cheng.
design automation conference (2002)
Auburn University
Peking University
University of California, Santa Barbara
Stanford University
Stanford University
Princeton University
University of California, Santa Barbara
University of California, Santa Barbara
National Tsing Hua University
Georgia Institute of Technology
Profile was last updated on December 6th, 2021.
Research.com Ranking is based on data retrieved from the Microsoft Academic Graph (MAG).
The ranking d-index is inferred from publications deemed to belong to the considered discipline.
If you think any of the details on this page are incorrect, let us know.
We appreciate your kind effort to assist us to improve this page, it would be helpful providing us with as much detail as possible in the text box below: