World's Best Scientists 2026 revealed!

D-Index & Metrics

Computer Science

D-Index
55
Citations
9506
World Ranking
4396
National Ranking
2052

Electronics and Electrical Engineering

D-Index
55
Citations
9471
World Ranking
2218
National Ranking
868

Research.com Recognitions

  • 2009 - IEEE Fellow For contributions to data compression and built-in self-test for integrated circuits

Overview

Nur A. Touba is affiliated with The University of Texas at Austin in the United States. Their research spans multiple domains within computer science and engineering, with a focus on areas related to electrical and electronic engineering.

Their main fields of study include:

  • Computer Science
  • Engineering

In terms of subfields, Nur A. Touba's work primarily covers:

  • Electrical and Electronic Engineering
  • Computer Networks and Communications
  • Hardware and Architecture

Their research topics encompass a range of technical areas such as:

  • Parallel Computing and Optimization Techniques
  • Advanced Data Storage Technologies
  • Advanced Memory and Neural Computing
  • Radiation Effects in Electronics
  • Low-power high-performance VLSI design
  • Interconnection Networks and Systems

Nur A. Touba has contributed to scientific literature through multiple publications. Notable papers include:

  • "CEnT: An Efficient Architecture to Eliminate Intra-Array Write Disturbance in PCM", 2021, published in IEEE Transactions on Computers
  • "A Single Error Correcting Code with One-Step Group Partitioned Decoding Based on Shared Majority-Vote", 2020, published in Electronics

Their frequent co-authors include:

  • Muhammad Imran
  • Taehyun Kwon
  • Joon-Sung Yang
  • Abhishek Das

Nur A. Touba's publication venues reflect their research interests and include:

  • IEEE Transactions on Computers
  • Electronics

In recognition of their work, Nur A. Touba was named an IEEE Fellow in 2009 for contributions to data compression and built-in self-test for integrated circuits.

Best Publications

  • Survey of Test Vector Compression Techniques

    N.A. Touba

  • Static compaction techniques to control scan vector power dissipation

    R. Sankaralingam;R.R. Oruganti;N.A. Touba

  • Scan vector compression/decompression using statistical coding

    A. Jas;J. Ghosh-Dastidar;N.A. Touba

  • Test vector decompression via cyclical scan chains and its application to testing core-based designs

    A. Jas;N.A. Touba

  • An efficient test vector compression scheme using selective Huffman coding

    A. Jas;J. Ghosh-Dastidar;Mom-Eng Ng;N.A. Touba

  • Cost-effective approach for reducing soft error failure rate in logic circuits

    K. Mohanram;N.A. Touba

  • Test vector encoding using partial LFSR reseeding

    C.V. Krishna;A. Jas;N.A. Touba

  • Altering a pseudo-random bit sequence for scan-based BIST

    N.A. Touba;E.J. McCluskey

  • Reducing test data volume using LFSR reseeding with seed compression

    C.V. Krishna;N.A. Touba

  • Multiple Bit Upset Tolerant Memory Using a Selective Cycle Avoidance Based SEC-DED-DAEC Code

    A. Dutta;N.A. Touba

  • Logic synthesis of multilevel circuits with concurrent error detection

    N.A. Touba;E.J. McCluskey;E.J. McCluskey

  • Reducing power dissipation during test using scan chain disable

    R. Sankaralingam;B. Pouya;N.A. Touba

  • Test point insertion based on path tracing

    N.A. Touba;E.J. McCluskey

  • Synthesis of circuits with low-cost concurrent error detection based on Bose-Lin codes

    D. Das;N.A. Touba

  • Weight-based codes and their application to concurrent error detection of multilevel circuits

    D. Das;N.A. Touba

  • Reducing test data volume using external/LBIST hybrid test patterns

    D. Das;N.A. Touba

  • System-on-Chip Test Architectures: Nanometer Design for Testability

    Laung-Terng Wang;Charles E. Stroud;Nur Touba

  • Controlling peak power during scan testing

    R. Sankaralingam;N.A. Touba

  • Virtual scan chains: a means for reducing scan length in cores

    A. Jas;B. Pouya;N.A. Touba

  • Test data compression using dictionaries with selective entries and fixed-length indices

    Lei Li;Krishnendu Chakrabarty;Nur A. Touba

Frequent Co-Authors

Edward J. McCluskey
Edward J. McCluskey Stanford University
Kartik Mohanram
Kartik Mohanram University of Pittsburgh
Eric MacDonald
Eric MacDonald Youngstown State University
Xiaoqing Wen
Xiaoqing Wen Kyushu Institute of Technology
Krishnendu Chakrabarty
Krishnendu Chakrabarty Arizona State University
Charles E. Stroud
Charles E. Stroud Auburn University
Hans-Joachim Wunderlich
Hans-Joachim Wunderlich University of Stuttgart
Patrick Girard
Patrick Girard Montpellier Laboratory of Informatics, Robotics and Microelectronics

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