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Charles E. Stroud

Charles E. Stroud

D-Index & Metrics

Electronics and Electrical Engineering

D-Index
39
Citations
5065
World Ranking
4770
National Ranking
1668

Overview

Charles E. Stroud is affiliated with Auburn University in the United States.

There are no records of recent papers published by Charles E. Stroud, including details such as paper titles, publication venues, or citation counts.

No frequent co-authors are listed for Charles E. Stroud.

There are no details available regarding frequent publication venues associated with Charles E. Stroud.

There is no information on book publications authored or contributed to by Charles E. Stroud.

Data about the main fields of study or subfields of study for Charles E. Stroud are not present.

No main topics of work or research areas have been identified.

There are no recorded awards or honors linked to Charles E. Stroud.

Best Publications

  • A Designer’s Guide to Built-In Self-Test

    Charles E. Stroud

  • Built-in self-test of FPGA interconnect

    C. Stroud;S. Wijesuriya;C. Hamilton;M. Abramovici

  • Built-in self-test of logic blocks in FPGAs (Finally, a free lunch: BIST without overhead!)

    C. Stroud;S. Konala;Ping Chen;M. Abramovici

  • Using roving STARs for on-line testing and diagnosis of FPGAs in fault-tolerant applications

    M. Abramovici;C. Strond;C. Hamilton;S. Wijesuriya

  • Dynamic fault tolerance in FPGAs via partial reconfiguration

    J. Emmert;C. Stroud;B. Skaggs;M. Abramovici

  • BIST-based test and diagnosis of FPGA logic blocks

    M. Abramovici;C.E. Stroud

  • System-on-Chip Test Architectures: Nanometer Design for Testability

    Laung-Terng Wang;Charles E. Stroud;Nur Touba

  • Online Fault Tolerance for FPGA Logic Blocks

    J.M. Emmert;C.E. Stroud;M. Abramovici

  • BIST-based diagnostics of FPGA logic blocks

    C. Stroud;E. Lee;M. Abramovici

  • Built-in Self Testing of Embedded Memories

    Sunil K. Jain;Charles E. Stroud

  • BIST-Based Delay-Fault Testing in FPGAs

    Miron Abramovici;Charles E. Stroud

  • Evaluation of FPGA Resources for Built-In Self-Test of Programmable Logic Blocks

    Charles Stroud;Ping Chen;Srinivasa Konala;Miron Abramovici

  • Reliability of majority voting based VLSI fault-tolerant circuits

    C.E. Stroud

  • Method of testing and diagnosing field programmable gate arrays

    Miron Abramovici;Eric Seng-Kar Lee;Charles Eugene Stroud

  • Benchmark circuits for analog and mixed-signal testing

    R. Kondagunturi;E. Bradley;K. Maggard;C. Stroud

  • System-on-Chip Test Architectures

    Laung Terng Wang;Charles E. Stroud;Nur A. Touba

  • Using ILA testing for BIST in FPGAs

    C. Stroud;E. Lee;S. Konala;M. Abramovici

  • Roving STARs: an integrated approach to on-line testing, diagnosis, and fault tolerance for FPGAs in adaptive computing systems

    M. Abramovici;J.M. Emmert;C.E. Stroud

  • BIST-based diagnosis of FPGA interconnect

    C. Stroud;J. Nall;M. Lashinsky;M. Abramovici

  • Automated BIST for sequential logic synthesis

    C.E. Stroud

  • BIST-based test and diagnosis of FPGA logic blocks : Reconfigurable and Adaptive VLSI Systems

    Miron Abramovici;Charles E. Stroud

Frequent Co-Authors

Miron Abramovici
Miron Abramovici Broadcom (United States)
Ramesh Karri
Ramesh Karri New York University
Jacob A. Abraham
Jacob A. Abraham The University of Texas at Austin
Nur A. Touba
Nur A. Touba The University of Texas at Austin
Gordon W. Roberts
Gordon W. Roberts McGill University
Richard C. Jaeger
Richard C. Jaeger Auburn University

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