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Stephen M. Trimberger

Stephen M. Trimberger

D-Index & Metrics

Electronics and Electrical Engineering

D-Index
61
Citations
12635
World Ranking
1562
National Ranking
634

Research.com Recognitions

  • 2018 - IEEE Donald O. Pederson Award in Solid-State Circuits “For contributions to field-programmable gate array technology.”
  • 2016 - Member of the National Academy of Engineering For contributions to architectures and programming tools for field-programmable gate arrays (FPGAs).
  • 2012 - IEEE Fellow For contributions to circuits, architectures and software technology for fleld-programmable gate arrays
  • 2010 - ACM Fellow For contributions to the design of programmable logic and reconfigurable architectures, and for the development of design automation tools that enable their use.
  • 2007 - ACM Distinguished Member

Overview

Stephen M. Trimberger is affiliated with Xilinx in the United States, where they contribute to research and development in the field of field-programmable gate arrays (FPGAs). Their work encompasses circuits, architectures, and software technology related to programmable logic devices.

Recognition for contributions to FPGA technology is reflected in several honors received over their career. In 2018, Trimberger was awarded the IEEE Donald O. Pederson Award in Solid-State Circuits, citing their contributions specifically to FPGA technology.

In 2016, they were elected as a member of the National Academy of Engineering for contributions to architectures and programming tools for FPGAs. The status of IEEE Fellow was conferred in 2012 for work in circuits, architectures, and software technology for field-programmable gate arrays.

Previously, in 2010, Trimberger was named an ACM Fellow for efforts in the design of programmable logic and reconfigurable architectures, as well as the development of design automation tools supporting their use. Earlier recognition as an ACM Distinguished Member was granted in 2007.

Best Publications

  • A time-multiplexed FPGA

    S. Trimberger;D. Carberry;A. Johnson;J. Wong

  • Method of time multiplexing a programmable logic device

    Stephen M. Trimberger;Richard A. Carberry;Robert Anders Johnson;Jennifer Wong

  • Time multiplexed programmable logic device

    Stephen M. Trimberger;Richard A. Carberry;Robert Anders Johnson;Jennifer Wong

  • Integrated circuit with field programmable and application specific logic areas

    Danesh Tavana;Wilson K. Yee;Stephen M. Trimberger

  • Method for making large-scale ASIC using pre-engineered long distance routing structure

    Stephen M. Trimberger

  • PLD having a window pane architecture with segmented interconnect wiring between logic block arrays

    Stephen M. Trimberger

  • Optimizing and operating a time multiplexed programmable logic device

    Stephen M. Trimberger

  • Computer-implemented method of optimizing a time multiplexed programmable logic device

    Stephen M. Trimberger

  • Three Ages of FPGAs: A Retrospective on the First Thirty Years of FPGA Technology

    Stephen M. Trimberger

  • Logic cell for field programmable gate array having optional internal feedback and optional cascade

    F. Erich Goetting;Stephen M. Trimberger

  • Field programmable gate array having programming instructions in the configuration bitstream

    Stephen M. Trimberger

  • Method for programming an FPLD using a library-based technology mapping algorithm

    Stephen M. Trimberger

  • Configuration modes for a time multiplexed programmable logic device

    Stephen M. Trimberger;Richard A. Carberry;Robert A. Johnson;Jennifer Wong

  • Method and apparatus for protecting proprietary configuration data for programmable logic devices

    Stephen M. Trimberger

  • Computer-implemented method of optimizing a design in a time multiplexed programmable logic device

    Stephen M. Trimberger

  • FPGA input output buffer with registered tristate enable

    Stephen M. Trimberger

  • Programmable logic device with time-multiplexed interconnect

    Stephen M. Trimberger

  • FPGA Security: Motivations, Features, and Applications

    Stephen M. Trimberger;Jason J. Moore

  • Logic placement using positionally asymmetrical partitioning algorithm

    Mon Ren Chene;Stephen M. Trimberger

  • Programmable logic device with hierarchical confiquration and state storage

    Stephen M. Trimberger;Richard A. Carberry;Robert Anders Johnson;Jennifer Wong

Frequent Co-Authors

Jennifer Wong
Jennifer Wong Xilinx (United States)
Bernard J. New
Bernard J. New Xilinx (United States)
Steven P. Young
Steven P. Young Xilinx (United States)
Jonathan Rose
Jonathan Rose University of Toronto

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