World's Best Scientists 2026 revealed!

D-Index & Metrics

Electronics and Electrical Engineering

D-Index
37
Citations
5735
World Ranking
5133
National Ranking
1779

Overview

What is he best known for?

The fields of study he is best known for:

  • Operating system
  • Algorithm
  • Integrated circuit

His primary areas of investigation include Integrated circuit, Routing, Electrical engineering, Microelectronics and Physical design. His studies in Integrated circuit integrate themes in fields like Perpendicular, Combinatorics, Graph, Integrated circuit design and Function. As a part of the same scientific family, he mostly works in the field of Combinatorics, focusing on Minification and, on occasion, Topology.

Many of his studies on Routing apply to Interconnection as well. His Microelectronics research incorporates themes from PMOS logic, Substrate, NMOS logic and NAND gate. His work deals with themes such as Transposition, Algorithm, Chip and Crossover, which intersect with Physical design.

His most cited work include:

  • Advanced modular cell placement system (225 citations)
  • Advanced modular cell placement system with overlap remover with minimal noise (180 citations)
  • CAD for hexagonal architecture (180 citations)

What are the main themes of his work throughout his whole career to date?

Ranko Scepanovic mainly investigates Integrated circuit, Routing, Electronic engineering, Topology and Computer hardware. His Integrated circuit research is multidisciplinary, incorporating elements of Process, Interconnection, Chip and Microelectronics. His studies deal with areas such as Perpendicular, Placement and Core as well as Routing.

His Electronic engineering study incorporates themes from Grid and Signal. His research investigates the connection between Topology and topics such as Semiconductor chip that intersect with issues in Surface and Position. His research investigates the connection with Computer hardware and areas like Integrated circuit design which intersect with concerns in Graph.

He most often published in these fields:

  • Integrated circuit (44.30%)
  • Routing (29.11%)
  • Electronic engineering (22.15%)

What were the highlights of his more recent work (between 2004-2015)?

  • Computer hardware (17.72%)
  • Netlist (7.59%)
  • Electronic engineering (22.15%)

In recent papers he was focusing on the following fields of study:

Ranko Scepanovic mostly deals with Computer hardware, Netlist, Electronic engineering, Path and Parallel computing. His Electronic engineering research includes elements of Digital signal, Signal and Interconnection. His Signal research incorporates themes from Read-only memory, Port, Binary number and Modular design.

His biological study spans a wide range of topics, including Integrated circuit design, Physical design, Integrated circuit, Boolean function and Base. His Parallel computing research focuses on Interleaved memory and how it relates to Physical address and Memory address. As part of his studies on Connection, Ranko Scepanovic often connects relevant areas like Routing.

Between 2004 and 2015, his most popular works were:

  • Architectural Floorplan for a Structured ASIC Manufactured on a 28 NM CMOS Process Lithographic Node or Smaller (36 citations)
  • Signal delay skew reduction system (14 citations)
  • Method and system for analyzing the quality of an OPC mask (11 citations)

In his most recent research, the most cited papers focused on:

  • Algorithm
  • Operating system
  • Topology

His primary scientific interests are in Computer hardware, Parallel computing, Table, Interleaving and Decoding methods. His work on Interleaved memory as part of general Computer hardware study is frequently connected to Layer, therefore bridging the gap between diverse disciplines of science and establishing a new relationship between them. The Parallel computing study combines topics in areas such as Integrated circuit layout, Type and Arithmetic.

Best Publications

  • Method of cell placement for an integrated circuit chip comprising chaotic placement and moving windows

    Michael D. Rostoker;James S. Koford;Edwin R. Jones;Douglas B. Boyle

  • CAD for hexagonal architecture

    Michael D. Rostoker;James S. Koford;Ranko Scepanovic;Edwin R. Jones

  • Advanced modular cell placement system with overlap remover with minimal noise

    Ranko Scepanovic;James S. Koford;Alexander E. Andreev

  • Hexagonal field programmable gate array architecture

    Michael D. Rostoker;James S. Koford;Ranko Scepanovic;Edwin R. Jones

  • Method and apparatus for parallel simultaneous global and detail routing

    Alexander E. Andreev;Elyar E. Gasanov;Ranko Scepanovic;Pedja Raspopovic

  • Microelectronic integrated circuit structure and method using three directional interconnect routing based on hexagonal geometry

    Ranko Scepanovic;James S. Koford;Valeriy B. Kudryavtsev;Alexander E. Andreev

  • Transistors having dynamically adjustable characteristics

    Michael D. Rostoker;James S. Koford;Ranko Scepanovic;Edwin R. Jones

  • Congestion based cost factor computing apparatus for integrated circuit physical design automation system

    Ranko Scepanovic;James S. Koford;Edwin E. Jones;Douglas B. Boyle

  • Cell placement representation and transposition for integrated circuit physical design automation system

    Ranko Scepanovic;James S Koford;Edwin R. Jones;Douglas B. Boyle

  • Method and apparatus for local optimization of the global routing

    Pedja Raspopovic;Ranko Scepanovic;Alexander E. Andreev

  • Microelectronic integrated circuit including triangular CMOS "nand" gate device

    Michael D. Rostoker;James S. Koford;Ranko Scepanovic;Edwin R. Jones

  • Architecture having diamond shaped or parallelogram shaped cells

    Michael D. Rostoker;James S. Koford;Ranko Scepanovic;Edwin R. Jones

  • Method and apparatus for hierarchical global routing descend

    Ranko Scepanovic;Alexander E. Andreev;Elyar E. Gasanov;Pedja Raspopovic

  • Cell placement alteration apparatus for integrated circuit chip physical design automation system

    James S. Koford;Ranko Scepanovic;Edwin R. Jones;Douglas B. Boyle

  • Hexagonal DRAM array

    Michael D. Rostoker;James S. Koford;Ranko Scepanovic;Edwin R. Jones

  • Net routing using basis element decomposition

    Elyar E. Gasanov;Ranko Scepanovic;Pedja Raspopovic;Alexander E. Andreev

  • Method and apparatus for minimization of process defects while routing

    Pedja Raspopovic;Ranko Scepanovic;Alexander E. Andreev

  • Integrated circuit floor plan optimization system

    Ranko Scepanovic;Alexander E. Andreev;Ivan Pasivic

  • Simultaneous placement and routing (SPAR) method for integrated circuit physical design automation system

    Edwin R. Jones;James S. Koford;Douglas B. Boyle;Ranko Scepanovic

  • Tri-directional interconnect architecture for SRAM

    Michael D. Rostoker;James S. Koford;Ranko Scepanovic;Edwin R. Jones

Frequent Co-Authors

Michael D. Rostoker
Michael D. Rostoker Broadcom (United States)

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