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D-Index & Metrics

Electronics and Electrical Engineering

D-Index
50
Citations
12652
World Ranking
2754
National Ranking
1049

Overview

James W. Tschanz is affiliated with Intel in the United States, contributing primarily to the field of Engineering with a focus on Electrical and Electronic Engineering. Their research interests extend to related subfields, including Biomedical Engineering, Hardware and Architecture, and Computer Networks and Communications.

Their work covers a range of main topics, such as:

  • Low-power high-performance VLSI design
  • Advancements in Semiconductor Devices and Circuit Design
  • Analog and Mixed-Signal Circuit Design
  • Semiconductor materials and devices
  • Advanced DC-DC Converters
  • Silicon Carbide Semiconductor Technologies
  • Advanced Memory and Neural Computing

James W. Tschanz has published extensively, with notable papers including:

  • A Variation-Adaptive Integrated Computational Digital LDO in 22-nm CMOS With Fast Transient Response, 2020, IEEE Journal of Solid-State Circuits
  • A 32-A, 5-V-Input, 94.2% Peak Efficiency High-Frequency Power Converter Module Featuring Package-Integrated Low-Voltage GaN nMOS Power Transistors, 2022, IEEE Journal of Solid-State Circuits
  • A Universal Modular Hybrid LDO With Fast Load Transient Response and Programmable PSRR in 14-nm CMOS Featuring Dynamic Clamp Strength Tuning, 2021, IEEE Journal of Solid-State Circuits
  • A 0.76V Vin Triode Region 4A Analog LDO with Distributed Gain Enhancement and Dynamic Load-Current Tracking in Intel 4 CMOS Featuring Active Feedforward Ripple Shaping and On-Chip Power Noise Analyzer, 2022, 2022 IEEE International Solid- State Circuits Conference (ISSCC)
  • Wide-Range Many-Core SoC Design in Scaled CMOS: Challenges and Opportunities, 2021, IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Their frequent coauthors include:

  • Vivek De
  • Harish K. Krishnamurthy
  • Krishnan Ravichandran
  • Sheldon Weng
  • Xiaosen Liu

James W. Tschanz's research has predominantly appeared in a core group of publication venues:

  • IEEE Journal of Solid-State Circuits
  • IEEE Solid-State Circuits Letters
  • IEEE Transactions on Very Large Scale Integration (VLSI) Systems
  • 2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)
  • 2022 IEEE International Solid- State Circuits Conference (ISSCC)

Best Publications

  • Parameter variations and impact on circuits and microarchitecture

    Shekhar Borkar;Tanay Karnik;Siva Narendra;Jim Tschanz

  • Adaptive body bias for reducing impacts of die-to-die and within-die parameter variations on microprocessor frequency and leakage

    J.W. Tschanz;J.T. Kao;S.G. Narendra;R. Nair

  • An 80-Tile Sub-100-W TeraFLOPS Processor in 65-nm CMOS

    Sriram R. Vangal;Jason Howard;Gregory Ruhl;Saurabh Dighe

  • An 80-Tile 1.28TFLOPS Network-on-Chip in 65nm CMOS

    Unknown

  • Dynamic-sleep transistor and body bias for active leakage power control of microprocessors

    J.W. Tschanz;S.G. Narendra;Y. Ye;B.A. Bloechel

  • Energy-Efficient and Metastability-Immune Resilient Circuits for Dynamic Variation Tolerance

    Keith A. Bowman;James W. Tschanz;Nam Sung Kim;Janice C. Lee

  • Comparative delay and energy of single edge-triggered and dual edge-triggered pulsed flip-flops for high-performance microprocessors

    James Tschanz;Siva Narendra;Zhanping Chen;Shekhar Borkar

  • A 45 nm Resilient Microprocessor Core for Dynamic Variation Tolerance

    K A Bowman;J W Tschanz;S L Lu;P A Aseron

  • Adaptive Frequency and Biasing Techniques for Tolerance to Dynamic Temperature-Voltage Variations and Aging

    J. Tschanz;Nam Sung Kim;S. Dighe;J. Howard

  • Measurements and analysis of SER-tolerant latch in a 90-nm dual-V/sub T/ CMOS process

    P. Hazucha;T. Karnik;S. Walstra;B.A. Bloechel

  • Neutron soft error rate measurements in a 90-nm CMOS process and scaling trends in SRAM from 0.25-/spl mu/m to 90-nm generation

    P. Hazucha;T. Karnik;J. Maiz;S. Walstra

  • Effectiveness of adaptive supply voltage and body bias for reducing impact of parameter variations in low power and high performance microprocessors

    J.W. Tschanz;S. Narendra;R. Nair;V. De

  • Tunable replica circuits and adaptive voltage-frequency techniques for dynamic voltage, temperature, and aging variation tolerance

    James Tschanz;Keith Bowman;Steve Walstra;Marty Agostinelli

  • Within-Die Variation-Aware Dynamic-Voltage-Frequency-Scaling With Optimal Core Allocation and Thread Hopping for the 80-Core TeraFLOPS Processor

    S Dighe;S R Vangal;P Aseron;S Kumar

  • Circuit techniques for dynamic variation tolerance

    Keith Bowman;James Tschanz;Chris Wilkerson;Shih-Lien Lu

  • Total power optimization by simultaneous dual-Vt allocation and device sizing in high performance microprocessors

    Tanay Karnik;Yibin Ye;James Tschanz;Liqiong Wei

  • Temperature dependent regulation of threshold voltage

    James W. Tschanz;Mircea R. Stan;Siva G. Narendra;Vivek K. De

  • Ultra-low voltage circuits and processor in 180nm to 90nm technologies with a swapped-body biasing technique

    S. Narendra;J. Tschanz;J. Hofsheier;B. Bloechel

  • A 0.45–1 V Fully-Integrated Distributed Switched Capacitor DC-DC Converter With High Density MIM Capacitor in 22 nm Tri-Gate CMOS

    Rinkle Jain;Bibiche M. Geuskens;Stephen T. Kim;Muhammad M. Khellah

  • Adaptive body bias for clock skew compensation

    James W. Tschanz;Nasser Kurd;Siva G. Narendra;Javed Barkatullah

  • Die-to-Die and Within-Die Parameter Variations on Microprocessor Frequency and Leakage

    James Tschanz;James Kao;Siva Narendra;Raj Nair

Frequent Co-Authors

Vivek De
Vivek De Intel (United States)
Muhammad M. Khellah
Muhammad M. Khellah Intel (United States)
Siva G. Narendra
Siva G. Narendra Tyfone, Inc.
Tanay Karnik
Tanay Karnik Intel (United States)
Keith Bowman
Keith Bowman Qualcomm (United States)
Arijit Raychowdhury
Arijit Raychowdhury Georgia Institute of Technology
Shih-Lien Lu
Shih-Lien Lu Washington State University
Dinesh Somasekhar
Dinesh Somasekhar Intel (United States)
Shekhar Borkar
Shekhar Borkar Qualcomm (United States)
Yehea Ismail
Yehea Ismail American University in Cairo

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