Parameter variations and impact on circuits and microarchitecture
Shekhar Borkar;Tanay Karnik;Siva Narendra;Jim Tschanz.
design automation conference (2003)
Adaptive body bias for reducing impacts of die-to-die and within-die parameter variations on microprocessor frequency and leakage
J.W. Tschanz;J.T. Kao;S.G. Narendra;R. Nair.
international solid-state circuits conference (2002)
An 80-Tile Sub-100-W TeraFLOPS Processor in 65-nm CMOS
Sriram R. Vangal;Jason Howard;Gregory Ruhl;Saurabh Dighe.
international solid-state circuits conference (2008)
Dynamic-sleep transistor and body bias for active leakage power control of microprocessors
J.W. Tschanz;S.G. Narendra;Y. Ye;B.A. Bloechel.
international solid-state circuits conference (2003)
Energy-Efficient and Metastability-Immune Resilient Circuits for Dynamic Variation Tolerance
Keith A. Bowman;James W. Tschanz;Nam Sung Kim;Janice C. Lee.
international solid-state circuits conference (2009)
Comparative delay and energy of single edge-triggered and dual edge-triggered pulsed flip-flops for high-performance microprocessors
James Tschanz;Siva Narendra;Zhanping Chen;Shekhar Borkar.
international symposium on low power electronics and design (2001)
Measurements and analysis of SER-tolerant latch in a 90-nm dual-V/sub T/ CMOS process
P. Hazucha;T. Karnik;S. Walstra;B.A. Bloechel.
IEEE Journal of Solid-state Circuits (2004)
Effectiveness of adaptive supply voltage and body bias for reducing impact of parameter variations in low power and high performance microprocessors
J.W. Tschanz;S. Narendra;R. Nair;V. De.
IEEE Journal of Solid-state Circuits (2003)
Tunable replica circuits and adaptive voltage-frequency techniques for dynamic voltage, temperature, and aging variation tolerance
James Tschanz;Keith Bowman;Steve Walstra;Marty Agostinelli.
symposium on vlsi circuits (2009)
Circuit techniques for dynamic variation tolerance
Keith Bowman;James Tschanz;Chris Wilkerson;Shih-Lien Lu.
design automation conference (2009)
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