Puneet Gupta mainly focuses on Electronic engineering, Design for manufacturability, Integrated circuit layout, Electrical engineering and Lithography. His Electronic engineering research includes themes of Reliability engineering, Leakage, Threshold voltage, Transistor and Biasing. His Design for manufacturability research includes elements of Linear programming, Mathematical optimization, Algorithm design and Process variation.
The Integrated circuit layout study combines topics in areas such as Reduction, Static timing analysis, Greedy algorithm, Correction algorithm and IC layout editor. His Electrical engineering research incorporates themes from Energy and Word error rate. Puneet Gupta has researched Lithography in several fields, including Information exchange, Manufacturing engineering and Turnaround time.
Puneet Gupta spends much of his time researching Electronic engineering, Lithography, Design for manufacturability, Process and Computer engineering. The various areas that Puneet Gupta examines in his Electronic engineering study include Transistor and Electrical engineering, Integrated circuit. His work focuses on many connections between Lithography and other disciplines, such as Photolithography, that overlap with his field of interest in Critical dimension.
His study in Design for manufacturability is interdisciplinary in nature, drawing from both Routing, Reliability engineering, Integrated circuit layout and Design flow. His Integrated circuit layout research is multidisciplinary, incorporating elements of Physical design, IC layout editor, Parametric statistics and Standard cell. His research investigates the connection between Computer engineering and topics such as Artificial neural network that intersect with problems in Massively parallel.
His primary areas of study are Electronic engineering, Computer engineering, Artificial neural network, Computer hardware and Electrical engineering. His work deals with themes such as Non-volatile memory and Electronic circuit, which intersect with Electronic engineering. His studies in Electronic circuit integrate themes in fields like Tunnel magnetoresistance, Circuit design and Integrated circuit.
His research on Computer engineering also deals with topics like
Puneet Gupta mainly investigates Electronic engineering, Computer engineering, Electrical engineering, Process and Electronic circuit. Puneet Gupta undertakes multidisciplinary investigations into Electronic engineering and Fine pitch in his work. His research in Computer engineering intersects with topics in Fault tolerance, Artificial neural network, Group method of data handling and Theoretical computer science.
His Electrical engineering research focuses on subjects like Amplitude, which are linked to Square Shape, Function, Pulse-width modulation and Kilobit. His studies deal with areas such as Computer hardware and Word error rate as well as Process. Puneet Gupta combines subjects such as Tunnel magnetoresistance, Circuit design and Integrated circuit with his study of Electronic circuit.
This overview was generated by a machine learning system which analysed the scientist’s body of work. If you have any feedback, you can contact us here.
Trading Accuracy for Power with an Underdesigned Multiplier Architecture
Parag Kulkarni;Puneet Gupta;Milos Ercegovac.
international conference on vlsi design (2011)
Trading Accuracy for Power with an Underdesigned Multiplier Architecture
Parag Kulkarni;Puneet Gupta;Milos Ercegovac.
international conference on vlsi design (2011)
Gate-length biasing for digital circuit optimization
Puneet Gupta;Andrew B. Kahng.
(2014)
Gate-length biasing for digital circuit optimization
Puneet Gupta;Andrew B. Kahng.
(2014)
Manufacturing-Aware Physical Design
Puneet Gupta;Andrew B. Kahng.
international conference on computer aided design (2003)
Tool for modifying mask design layout
Andrew B. Kahng;Puneet Gupta;Dennis Sylvester;Jie Yang.
(2009)
Manufacturing-Aware Physical Design
Puneet Gupta;Andrew B. Kahng.
international conference on computer aided design (2003)
Tool for modifying mask design layout
Andrew B. Kahng;Puneet Gupta;Dennis Sylvester;Jie Yang.
(2009)
Toward through-process layout quality metrics
Fook-Luen Heng;Jin-Fuw Lee;Puneet Gupta.
Design and process integration for microelectronic manufacturing. Conference (2005)
Toward through-process layout quality metrics
Fook-Luen Heng;Jin-Fuw Lee;Puneet Gupta.
Design and process integration for microelectronic manufacturing. Conference (2005)
If you think any of the details on this page are incorrect, let us know.
We appreciate your kind effort to assist us to improve this page, it would be helpful providing us with as much detail as possible in the text box below:
University of California, San Diego
University of Michigan–Ann Arbor
University of California, Irvine
University of California, Irvine
University of California, Los Angeles
University of California, Los Angeles
University of California, Los Angeles
University of California, Los Angeles
University of California, Los Angeles
University of Illinois at Urbana-Champaign
University of Louisville
Vrije Universiteit Amsterdam
University of Calgary
Medical College of Wisconsin
Nanjing University
Shaanxi University of Science and Technology
Kyoto University
University of Franche-Comté
Keio University
Goddard Space Flight Center
Bielefeld University
University of California, San Francisco
Griffith University
Utrecht University
University of Washington
University of California, Los Angeles