World's Best Scientists 2026 revealed!

D-Index & Metrics

Electronics and Electrical Engineering

D-Index
40
Citations
7229
World Ranking
4470
National Ranking
1587

Overview

Chi On Chui is affiliated with the University of California, Los Angeles in the United States and conducts research primarily in the field of Engineering.

The scientist's work spans several subfields of study, including Electrical and Electronic Engineering, Biomedical Engineering, Computational Mechanics, Surfaces, Coatings and Films, and Atomic and Molecular Physics, and Optics.

The main research topics covered by Chi On Chui include:

  • Advancements in Semiconductor Devices and Circuit Design
  • Nanowire Synthesis and Applications
  • Low-power high-performance VLSI design
  • Radiation Effects in Electronics
  • Semiconductor materials and devices
  • Integrated Circuits and Semiconductor Failure Analysis
  • Fluid Dynamics and Thin Films

Chi On Chui has published several papers in diverse venues. Recent publications include:

  • "A 3nm CMOS FinFlex™ Platform Technology with Enhanced Power Efficiency and Performance for Mobile SoC and High Performance Computing Applications," 2022, 2022 International Electron Devices Meeting (IEDM)
  • "Critical Process Features Enabling Aggressive Contacted Gate Pitch Scaling for 3nm CMOS Technology and Beyond," 2022, 2022 International Electron Devices Meeting (IEDM)
  • "Nanoparticles suppress fluid instabilities in the thermal drawing of ultralong nanowires," 2020, Nature Communications
  • "On Noise Performance of Dual-Gated Silicon FET Biosensors With Schottky Contacts," 2021, IEEE Transactions on Electron Devices
  • "On nonlinearity in field-effect transistor-based binding assay response," 2022, Applied Physics Letters

Frequent coauthors of Chi On Chui include M.C. Chiang, J.J. Liaw, J.-Y. Yeh, H.F. Chen, and K.T. Lai. Each of these collaborators has coauthored multiple papers with the scientist.

Publication venues where Chi On Chui's work most often appears include:

  • 2022 International Electron Devices Meeting (IEDM)
  • Nature Communications
  • IEEE Transactions on Electron Devices
  • Applied Physics Letters

Best Publications

  • On the Correct Extraction of Interface Trap Density of MOS Devices With High-Mobility Semiconductor Substrates

    K. Martens;Chi On Chui;G. Brammertz;B. De Jaeger

  • Germanium MOS capacitors incorporating ultrathin high-/spl kappa/ gate dielectric

    Chi On Chui;S. Ramanathan;B.B. Triplett;P.C. McIntyre

  • A sub-400/spl deg/C germanium MOSFET technology with high-/spl kappa/ dielectric and metal gate

    Chi On Chui;Hyoungsub Kim;D. Chi;B.B. Triplett

  • Activation and diffusion studies of ion-implanted p and n dopants in germanium

    Chi On Chui;Kailash Gopalakrishnan;Peter B. Griffin;James D. Plummer

  • Forming a type i heterostructure in a group iv semiconductor

    Chi On Chui;Prashant Majhi;Wilman Tsai;Jack T. Kavalieros

  • Engineering chemically abrupt high-k metal oxide∕silicon interfaces using an oxygen-gettering metal overlayer

    Hyoungsub Kim;Paul C. McIntyre;Chi On Chui;Krishna C. Saraswat

  • Effects of hydrogen annealing on heteroepitaxial-Ge layers on Si: Surface roughness and electrical quality

    Ammar Nayfeh;Chi On Chui;Krishna C. Saraswat;Takao Yonehara

  • A stacked memory device on logic 3D technology for ultra-high-density data storage

    Jiyoung Kim;Augustin J. Hong;Sung Min Kim;Kyeong Sik Shin

  • High performance germanium MOSFETs

    Krishna Saraswat;Chi On Chui;Tejas Krishnamohan;Donghyun Kim

  • Variability Impact of Random Dopant Fluctuation on Nanoscale Junctionless FinFETs

    G. Leung;Chi On Chui

  • Interfacial characteristics of HfO2 grown on nitrided Ge (100) substrates by atomic-layer deposition

    Hyoungsub Kim;Paul C. McIntyre;Chi On Chui;Krishna C. Saraswat

  • Nanoscale germanium MOS Dielectrics-part I: germanium oxynitrides

    Chi On Chui;F. Ito;K.C. Saraswat

  • Atomic layer deposition of high-/spl kappa/ dielectric for germanium MOS applications - substrate

    Chi On Chui;H. Kim;P.C. McIntyre;K.C. Saraswat

  • Effective dark current suppression with asymmetric MSM photodetectors in Group IV semiconductors

    Chi On Chui;A.K. Okyay;K.C. Saraswat

  • On the origin of enhanced sensitivity in nanoscale FET-based biosensors.

    Kaveh Shoorideh;Chi On Chui

  • Scalability and electrical properties of germanium oxynitride MOS dielectrics

    Chi On Chui;F. Ito;K.C. Saraswat

  • Ge based high performance nanoscale MOSFETs

    Krishna C. Saraswat;Chi On Chui;Tejas Krishnamohan;Ammar Nayfeh

  • 5nm CMOS Production Technology Platform featuring full-fledged EUV, and High Mobility Channel FinFETs with densest 0.021µm2 SRAM cells for Mobile SoC and High Performance Computing Applications

    Unknown

  • InGaAs metal-oxide-semiconductor capacitors with HfO2 gate dielectric grown by atomic-layer deposition

    N. Goel;P. Majhi;C. O. Chui;W. Tsai

  • Thermal analysis of heterogeneous 3D ICs with various integration scenarios

    Ting-Yen Chiang;S.J. Souri;Chi On Chui;K.C. Saraswat

  • Nanoscale germanium MOS Dielectrics-part II: high-/spl kappa/ gate dielectrics

    Chi On Chui;H. Kim;D. Chi;P.C. McIntyre

Frequent Co-Authors

Krishna C. Saraswat
Krishna C. Saraswat Stanford University
Paul C. McIntyre
Paul C. McIntyre Stanford University
Hyoungsub Kim
Hyoungsub Kim Sungkyunkwan University
Puneet Gupta
Puneet Gupta University of California, Los Angeles
Prashant Majhi
Prashant Majhi Intel (United States)
Bruce Dunn
Bruce Dunn University of California, Los Angeles
Robert W. Dutton
Robert W. Dutton Stanford University
Yahya Rahmat-Samii
Yahya Rahmat-Samii University of California, Los Angeles
Yoshio Nishi
Yoshio Nishi Stanford University
Ali Kemal Okyay
Ali Kemal Okyay Stanford University

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