World's Best Scientists 2026 revealed!

D-Index & Metrics

Electronics and Electrical Engineering

D-Index
31
Citations
4368
World Ranking
6541
National Ranking
2146

Mark A. Anders publication distribution in Electronics and Electrical Engineering in 2026

The chart shows the distribution of publications by all Research.com ranked scientists in the field of Electronics and Electrical Engineering in 2026. The highlighted bar marks where Mark A. Anders sits on this spectrum.

34–53 publications: 24 scientists 54–73 publications: 52 scientists 74–93 publications: 114 scientists 94–113 publications: 203 scientists 114–133 publications: 269 scientists 134–153 publications: 355 scientists 154–173 publications: 403 scientists 174–193 publications: 445 scientists 194–213 publications: 430 scientists 214–233 publications: 431 scientists 234–253 publications: 399 scientists 254–273 publications: 366 scientists 274–293 publications: 335 scientists 294–313 publications: 300 scientists 314–333 publications: 276 scientists 334–353 publications: 250 scientists 354–373 publications: 214 scientists 374–393 publications: 187 scientists 394–413 publications: 152 scientists 414–433 publications: 169 scientists 434–453 publications: 147 scientists 454–473 publications: 111 scientists 474–493 publications: 117 scientists 494–513 publications: 103 scientists 514–533 publications: 99 scientists 534–553 publications: 92 scientists 554–573 publications: 75 scientists 574–593 publications: 58 scientists 594–613 publications: 69 scientists 614–633 publications: 50 scientists 634–653 publications: 62 scientists 654–673 publications: 54 scientists 674–693 publications: 44 scientists 694–713 publications: 37 scientists 714–733 publications: 28 scientists 734–753 publications: 26 scientists 754–773 publications: 26 scientists 774–793 publications: 19 scientists 794–813 publications: 23 scientists 814–833 publications: 20 scientists 834–853 publications: 16 scientists 854–873 publications: 20 scientists 874–893 publications: 11 scientists 894–913 publications: 11 scientists 914–933 publications: 16 scientists 934–953 publications: 13 scientists 954–973 publications: 10 scientists 974–993 publications: 11 scientists 994–1,013 publications: 9 scientists 1,014–1,033 publications: 9 scientists 1,034–1,053 publications: 10 scientists 1,054–1,064 publications: 6 scientists 1,065+ publications: 99 scientists
34 publications 1,065+

This scientist: 152 publications — 15th percentile

15% of scientists in this discipline score the same or lower.

The last bar groups every scientist with 1,065 publications or more.

Mark A. Anders D-index placement in Electronics and Electrical Engineering in 2026

The chart shows the D-index (discipline H-index) distribution of Electronics and Electrical Engineering scientists ranked by Research.com in 2026. The highlighted bar marks where Mark A. Anders sits on this spectrum.

30 D-Index: 178 scientists 31 D-Index: 257 scientists 32 D-Index: 263 scientists 33 D-Index: 262 scientists 34 D-Index: 244 scientists 35 D-Index: 236 scientists 36 D-Index: 211 scientists 37 D-Index: 220 scientists 38 D-Index: 214 scientists 39 D-Index: 214 scientists 40 D-Index: 205 scientists 41 D-Index: 187 scientists 42 D-Index: 194 scientists 43 D-Index: 201 scientists 44 D-Index: 155 scientists 45 D-Index: 189 scientists 46 D-Index: 148 scientists 47 D-Index: 160 scientists 48 D-Index: 134 scientists 49 D-Index: 130 scientists 50 D-Index: 141 scientists 51 D-Index: 156 scientists 52 D-Index: 108 scientists 53 D-Index: 130 scientists 54 D-Index: 112 scientists 55 D-Index: 97 scientists 56 D-Index: 111 scientists 57 D-Index: 102 scientists 58 D-Index: 108 scientists 59 D-Index: 120 scientists 60 D-Index: 103 scientists 61 D-Index: 93 scientists 62 D-Index: 92 scientists 63 D-Index: 74 scientists 64 D-Index: 77 scientists 65 D-Index: 73 scientists 66 D-Index: 64 scientists 67 D-Index: 69 scientists 68 D-Index: 60 scientists 69 D-Index: 39 scientists 70 D-Index: 57 scientists 71 D-Index: 59 scientists 72 D-Index: 46 scientists 73 D-Index: 49 scientists 74 D-Index: 38 scientists 75 D-Index: 35 scientists 76 D-Index: 32 scientists 77 D-Index: 35 scientists 78 D-Index: 31 scientists 79 D-Index: 22 scientists 80 D-Index: 34 scientists 81 D-Index: 31 scientists 82 D-Index: 34 scientists 83 D-Index: 23 scientists 84 D-Index: 18 scientists 85 D-Index: 30 scientists 86 D-Index: 19 scientists 87 D-Index: 19 scientists 88 D-Index: 20 scientists 89 D-Index: 8 scientists 90 D-Index: 17 scientists 91 D-Index: 7 scientists 92 D-Index: 14 scientists 93 D-Index: 9 scientists 94 D-Index: 15 scientists 95 D-Index: 10 scientists 96 D-Index: 12 scientists 97 D-Index: 10 scientists 98 D-Index: 10 scientists 99 D-Index: 12 scientists 100 D-Index: 16 scientists 101 D-Index: 5 scientists 102 D-Index: 7 scientists 103 D-Index: 7 scientists 104 D-Index: 8 scientists 105 D-Index: 9 scientists 106 D-Index: 13 scientists 107 D-Index: 4 scientists 108 D-Index: 5 scientists 109 D-Index: 10 scientists 110 D-Index: 8 scientists 111+ D-Index: 96 scientists
30 D-Index 111+

This scientist: 31 D-Index — 6th percentile

6% of scientists in this discipline score the same or lower.

The last bar groups every scientist with 111 D-Index or more.

Overview

Mark A. Anders is affiliated with Intel in the United States and has contributed extensively to research in engineering and computer science. Their work focuses on areas including electrical and electronic engineering, artificial intelligence, hardware and architecture, mechanical engineering, and computer vision and pattern recognition.

The scientist's research topics include:

  • Advanced Memory and Neural Computing
  • Cryptographic Implementations and Security
  • Physical Unclonable Functions (PUFs) and Hardware Security
  • Semiconductor materials and devices
  • Advancements in Semiconductor Devices and Circuit Design
  • Security and Verification in Computing
  • Epoxy Resin Curing Processes

Mark A. Anders has frequently published in the following venues:

  • IEEE Journal of Solid-State Circuits
  • Advanced Manufacturing Polymer & Composites Science
  • IEEE Solid-State Circuits Letters
  • Journal of Applied Physics
  • 2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)

Representative recent papers authored or co-authored by Mark A. Anders include:

  • A 617-TOPS/W All-Digital Binary Neural Network Accelerator in 10-nm FinFET CMOS, 2020, IEEE Journal of Solid-State Circuits
  • A 4900-μm2 839-Mb/s Side-Channel Attack- Resistant AES-128 in 14-nm CMOS With Heterogeneous Sboxes, Linear Masked MixColumns, and Dual-Rail Key Addition, 2020, IEEE Journal of Solid-State Circuits
  • A Time-/Frequency-Domain Side-Channel Attack Resistant AES-128 and RSA-4K Crypto-Processor in 14-nm CMOS, 2021, IEEE Journal of Solid-State Circuits
  • Data-driven RRAM device models using Kriging interpolation, 2022, Scientific Reports
  • An 8.3-to-18Gbps Reconfigurable SCA-Resistant/Dual-Core/Blind-Bulk AES Engine in Intel 4 CMOS, 2022, 2022 IEEE International Solid-State Circuits Conference (ISSCC)

Frequent collaborators in Mark A. Anders's research include Amit Agarwal, Raghavan Kumar, Vivek De, Ram Krishnamurthy, and Vikram Suresh. These co-authors have contributed to multiple publications alongside Anders, reflecting collaborative work largely in semiconductor and cryptographic research areas.

Best Publications

  • Near-threshold voltage (NTV) design: opportunities and challenges

    Himanshu Kaul;Mark Anders;Steven Hsu;Amit Agarwal

  • 16.2 A 0.19pJ/b PVT-variation-tolerant hybrid physically unclonable function circuit for 100% stable secure key generation in 22nm CMOS

    Sanu K. Mathew;Sudhir K. Satpathy;Mark A. Anders;Himanshu Kaul

  • A 4-GHz 130-nm address generation unit with 32-bit sparse-tree adder core

    S. Mathew;M. Anders;R.K. Krishnamurthy;S. Borkar

  • 2.4 Gbps, 7 mW All-Digital PVT-Variation Tolerant True Random Number Generator for 45 nm CMOS High-Performance Microprocessors

    S. K. Mathew;S. Srinivasan;M. A. Anders;H. Kaul

  • 53 Gbps Native ${ m GF}(2 ^{4}) ^{2}$ Composite-Field AES-Encrypt/Decrypt Accelerator for Content-Protection in 45 nm High-Performance Microprocessors

    S K Mathew;F Sheikh;M Kounavis;S Gueron

  • 340 mV–1.1 V, 289 Gbps/W, 2090-Gate NanoAES Hardware Accelerator With Area-Optimized Encrypt/Decrypt GF(2 4 ) 2 Polynomials in 22 nm Tri-Gate CMOS

    Sanu Mathew;Sudhir Satpathy;Vikram Suresh;Mark Anders

  • A 320 mV 56 μW 411 GOPS/Watt Ultra-Low Voltage Motion Estimation Accelerator in 65 nm CMOS

    H. Kaul;M.A. Anders;S.K. Mathew;S.K. Hsu

  • A 4-GHz 300-mW 64-bit integer execution ALU with dual supply voltages in 90-nm CMOS

    S.K. Mathew;M.A. Anders;B. Bloechel;Trang Nguyen

  • An improved unified scalable radix-2 Montgomery multiplier

    D. Harris;R. Krishnamurthy;M. Anders;S. Mathew

  • A 4-fJ/b Delay-Hardened Physically Unclonable Function Circuit With Selective Bit Destabilization in 14-nm Trigate CMOS

    Sudhir Satpathy;Sanu K. Mathew;Vikram Suresh;Mark A. Anders

  • $\mu $ RNG: A 300–950 mV, 323 Gbps/W All-Digital Full-Entropy True Random Number Generator in 14 nm FinFET CMOS

    Sanu K. Mathew;David Johnston;Sudhir Satpathy;Vikram Suresh

  • A 110 GOPS/W 16-bit multiplier and reconfigurable PLA loop in 90-nm CMOS

    S.K. Hsu;S.K. Mathew;M.A. Anders;B.R. Zeydel

  • 16.1 A 340mV-to-0.9V 20.2Tb/s source-synchronous hybrid packet/circuit-switched 16×16 network-on-chip in 22nm tri-gate CMOS

    Gregory Chen;Mark A. Anders;Himanshu Kaul;Sudhir K. Satpathy

  • An All-Digital Unified Physically Unclonable Function and True Random Number Generator Featuring Self-Calibrating Hierarchical Von Neumann Extraction in 14-nm Tri-gate CMOS

    Sudhir K. Satpathy;Sanu K. Mathew;Raghavan Kumar;Vikram Suresh

  • Sub-500-ps 64-b ALUs in 0.18-/spl mu/m SOI/bulk CMOS: design and scaling trends

    S.K. Mathew;R.K. Krishnamurthy;M.A. Anders;R. Rios

  • A 300 mV 494GOPS/W Reconfigurable Dual-Supply 4-Way SIMD Vector Processing Accelerator in 45 nm CMOS

    Himanshu Kaul;Mark A. Anders;Sanu K. Mathew;Steven K. Hsu

  • 2.4GHz 7mW all-digital PVT-variation tolerant True Random Number Generator in 45nm CMOS

    Suresh Srinivasan;Sanu Mathew;Rajaraman Ramanarayanan;Farhana Sheikh

  • Sub-500-ps 64-b ALUs in 0 . 18-m SOI / Bulk CMOS : Design and Scaling Trends

    Unknown

  • A 320mV-to-1.2V on-die fine-grained reconfigurable fabric for DSP/media accelerators in 32nm CMOS

    Amit Agarwal;Sanu K Mathew;Steven K Hsu;Mark A Anders

  • Robustness of sub-70 nm dynamic circuits: analytical techniques and scaling trends

    M. Anders;R. Krishnamurthy;R. Spotten;K. Soumyanath

  • Variable precision floating point multiply-add circuit

    Himanshu Kaul;Mark A. Anders;Sanu K. Mathew;Ram K. Krishnamurthy

Frequent Co-Authors

Ram Krishnamurthy
Ram Krishnamurthy Intel (United States)
Sanu Mathew
Sanu Mathew Intel (United States)
Amit Agarwal
Amit Agarwal Indian Institute of Technology Kanpur
Vivek De
Vivek De Intel (United States)
Raghavan Kumar
Raghavan Kumar Intel (United States)
Shekhar Borkar
Shekhar Borkar Qualcomm (United States)
Dennis Sylvester
Dennis Sylvester University of Michigan–Ann Arbor
Siva G. Narendra
Siva G. Narendra Tyfone, Inc.
Wayne Burleson
Wayne Burleson University of Massachusetts Amherst
Dinesh Somasekhar
Dinesh Somasekhar Intel (United States)

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