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C. Fenouillet-Beranger

C. Fenouillet-Beranger

D-Index & Metrics

Electronics and Electrical Engineering

D-Index
34
Citations
5308
World Ranking
5767
National Ranking
123

Overview

C. Fenouillet-Beranger is affiliated with CEA LETI in France. Their research primarily focuses on the field of Engineering, with a specialization in Electrical and Electronic Engineering and Biomedical Engineering. The scientist's work covers a diverse range of topics related to semiconductor technology, circuit design, and advanced materials.

The main topics addressed in their research include:

  • Advancements in Semiconductor Devices and Circuit Design
  • Semiconductor Materials and Devices
  • Integrated Circuits and Semiconductor Failure Analysis
  • Nanowire Synthesis and Applications
  • Advanced Memory and Neural Computing
  • Ferroelectric and Negative Capacitance Devices
  • Analog and Mixed-Signal Circuit Design

The scientist's publication record includes papers in prominent venues such as Solid-State Electronics, IEEE Transactions on Electron Devices, the 2021 IEEE International Electron Devices Meeting (IEDM), SSRN Electronic Journal, and Nature Reviews Electrical Engineering. Some of the key publications are:

  • A Review of Low Temperature Process Modules Leading Up to the First (≤500 °C) Planar FDSOI CMOS Devices for 3-D Sequential Integration (2021) in IEEE Transactions on Electron Devices
  • 3D sequential integration: applications and associated key enabling modules (design & technology) (2021) in 2021 IEEE International Electron Devices Meeting (IEDM)
  • Europe's pilot line on fully depleted silicon-on-insulator technology (FAMES) (2025) in Nature Reviews Electrical Engineering
  • Toward full relaxation of sSOI substrates for PFET device fabrication (2025) in Solid-State Electronics
  • Pursuing the FD-SOI roadmap down to 10 nm and 7 nm nodes for high energy efficient, low power and RF/mmWave applications (2025) in Solid-State Electronics

The researcher frequently collaborates with other scientists known in the field, including Laurent Brunet, Joël Kanyandekwe, B. Duriez, V. Lapras, and T. Mota Frutuoso. Collaborations often focus on semiconductor technology and related engineering challenges.

Publication venues where C. Fenouillet-Beranger has most frequently contributed are:

  • Solid-State Electronics (3 publications)
  • SSRN Electronic Journal (2 publications)
  • IEEE Transactions on Electron Devices (1 publication)
  • 2021 IEEE International Electron Devices Meeting (IEDM) (1 publication)
  • Nature Reviews Electrical Engineering (1 publication)

Best Publications

  • 28nm FDSOI technology platform for high-speed low-voltage digital applications

    N. Planes;O. Weber;V. Barral;S. Haendler

  • Plasma wave detection of terahertz radiation by silicon field effects transistors: Responsivity and noise equivalent power

    R. Tauk;F. Teppe;S. Boubanga;D. Coquillat

  • Multi- $V_{T}$ UTBB FDSOI Device Architectures for Low-Power CMOS Circuit

    J-P Noel;O. Thomas;M. Jaud;O. Weber

  • Planar Fully depleted SOI technology: A powerful architecture for the 20nm node and beyond

    O. Faynot;F. Andrieu;O. Weber;C. Fenouillet-Beranger

  • High immunity to threshold voltage variability in undoped ultra-thin FDSOI MOSFETs and its physical understanding

    O. Weber;O. Faynot;F. Andrieu;C. Buj-Dufournet

  • Innovative Materials, Devices, and CMOS Technologies for Low-Power Mobile Multimedia

    Unknown

  • FDSOI devices with thin BOX and ground plane integration for 32 nm node and below

    C. Fenouillet-Beranger;S. Denorme;P. Perreau;C. Buj

  • 3DVLSI with CoolCube process: An alternative path to scaling

    P. Batude;C. Fenouillet-Beranger;L. Pasini;V. Lu

  • Impact of a 10nm Ultra-Thin BOX (UTBOX) and Ground Plane on FDSOI devices for 32nm node and below

    C. Fenouillet-Beranger;P. Perreau;S. Denorme;L. Tosti

  • Low leakage and low variability Ultra-Thin Body and Buried Oxide (UT2B) SOI technology for 20nm low power CMOS and beyond

    F. Andrieu;O. Weber;J. Mazurier;O. Thomas

  • Requirements for ultra-thin-film devices and new materials for the CMOS roadmap

    C. Fenouillet-Beranger;T. Skotnicki;S. Monfray;N. Carriere

  • First demonstration of a CMOS over CMOS 3D VLSI CoolCube™ integration on 300mm wafers

    L. Brunet;P. Batude;C. Fenouillet-Beranger;P. Besombes

  • Strained FDSOI CMOS technology scalability down to 2.5nm film thickness and 18nm gate length with a TiN/HfO 2 gate stack

    V. Barral;T. Poiroux;F. Andrieu;C. Buj-Dufournet

  • Impact of a 10 nm ultra-thin BOX (UTBOX) and ground plane on FDSOI devices for 32 nm node and below

    C. Fenouillet-Beranger;P. Perreau;S. Denorme;L. Tosti

  • 3D Sequential Integration: Application-driven technological achievements and guidelines

    P. Batude;L. Brunet;C. Fenouillet-Beranger;F. Andrieu

  • Efficient multi-V T FDSOI technology with UTBOX for low power circuit design

    C. Fenouillet-Beranger;O. Thomas;P. Perreau;J-P. Noel

  • Fully-depleted SOI technology using high-k and single-metal gate for 32 nm node LSTP applications featuring 0.179 μm2 6T-SRAM bitcell

    Unknown

  • On the Variability in Planar FDSOI Technology: From MOSFETs to SRAM Cells

    J. Mazurier;O. Weber;F. Andrieu;A. Toffoli

  • Gate-induced floating-body effect in fully-depleted SOI MOSFETs with tunneling oxide and back-gate biasing

    M. Cassé;J. Pretet;J. Pretet;S. Cristoloveanu;T. Poiroux

  • A capacitor-less DRAM cell on 75nm gate length, 16nm thin fully depleted SOI device for high density embedded memories

    Unknown

  • Hybrid FDSOI/bulk High-k/metal gate platform for low power (LP) multimedia technology

    C. Fenouillet-Beranger;P. Perreau;L. Pham-Nguyen;S. Denorme

  • Monolithic 3D integration: A powerful alternative to classical 2D scaling

    M. Vinet;P. Batude;C. Fenouillet-Beranger;F. Clermidy

  • Work-function engineering in gate first technology for multi-V T dual-gate FDSOI CMOS on UTBOX

    O. Weber;F. Andrieu;J. Mazurier;M. Casse

Frequent Co-Authors

Gerard Ghibaudo
Gerard Ghibaudo Grenoble Alpes University
O. Faynot
O. Faynot CEA LETI
Thomas Skotnicki
Thomas Skotnicki Warsaw University of Technology
Bich-Yen Nguyen
Bich-Yen Nguyen Soitec (France)
E. Vianello
E. Vianello French Alternative Energies and Atomic Energy Commission (CEA)
Sorin Cristoloveanu
Sorin Cristoloveanu Grenoble Institute of Technology
S. Barraud
S. Barraud Atomic Energy and Alternative Energies Commission

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