His primary scientific interests are in Computer hardware, Electronic engineering, Memory array, Line and Clock skew. His work carried out in the field of Computer hardware brings together such families of science as Data strobe encoding and Integrated circuit. As part of the same scientific family, Troy A. Manning usually focuses on Integrated circuit, concentrating on Data access and intersecting with Memory module.
His work on Stub as part of general Electronic engineering research is frequently linked to Controller, bridging the gap between disciplines. His work investigates the relationship between Memory array and topics such as System bus that intersect with problems in Transfer and Phase. His Clock skew study frequently draws connections to other fields, such as Synchronous circuit.
The scientist’s investigation covers issues in Computer hardware, Electronic engineering, Signal, Electrical engineering and Voltage. Many of his studies on Computer hardware involve topics that are commonly interrelated, such as Column. His Electronic engineering research incorporates themes from Clock skew, Electronic circuit, Synchronous circuit, Digital signal and Integrated circuit.
As part of one scientific family, Troy A. Manning deals mainly with the area of Clock skew, narrowing it down to issues related to the Clock domain crossing, and often Digital clock manager and Self-clocking signal. His study on Clock rate is often connected to Mode as part of broader study in Signal. His Dram research focuses on Dynamic random-access memory and how it relates to Multiplexer.
Troy A. Manning mainly investigates Computer hardware, Logical operations, Arithmetic, Memory array and Physical address. His Computer hardware study which covers Memory cell that intersects with Electronic engineering. His work deals with themes such as NAND gate, Exclusive or and Voltage, which intersect with Electronic engineering.
His Arithmetic research also works with subjects such as
His primary areas of investigation include Computer hardware, Memory array, Line, Electronic engineering and Memory cell. His Computer hardware research is mostly focused on the topic Address bus. His Memory array research integrates issues from Address space, Flat memory model, Data mining and Physical address.
His Electronic engineering research is multidisciplinary, incorporating perspectives in NAND gate, Exclusive or and Voltage. Much of his study explores Exclusive or relationship to Computer memory. The subject of his Memory cell research is within the realm of Electrical engineering.
This overview was generated by a machine learning system which analysed the scientist’s body of work. If you have any feedback, you can contact us here.
Memory system having synchronous-link DRAM (SLDRAM) devices and controller
David B. Gustavson;David V. James;Hans A. Wiggers;Peter B. Gillingham.
(1998)
Distributed write data drivers for burst access memories
Todd A. Merritt;Troy A. Manning.
(2002)
Near-Data Processing: Insights from a MICRO-46 Workshop
Rajeev Balasubramonian;Jichuan Chang;Troy Manning;Jaime H. Moreno.
IEEE Micro (2014)
Method and apparatus for memory array compressed data testing
Brent Keeth;Troy A. Manning;Chris G. Martin;Kim M. Pierce.
(1997)
Method and apparatus for adaptively adjusting the timing of a clock signal used to latch digital signals, and memory device using same
Jacob Russel Baker;A. Troy Manning.
(1998)
Antifuse method to repair columns in a prefetched output memory architecture
Troy A. Manning;Chris G. Martin;Shubneesh Batra;Donald M. Morgan.
(2000)
Apparatuses and methods for performing logical operations using sensing circuitry
Troy A. Manning.
(2015)
Dynamic random-access memory having a hierarchical data path
Adrian Ong;Paul S. Zagar;Troy Manning;Brent Keeth.
(1998)
Burst EDO memory device
Paul S. Zagar;Brett L. Williams;Troy A. Manning.
(1996)
Memory device with staggered data paths
Troy A. Manning.
(1997)
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