World's Best Scientists 2026 revealed!

D-Index & Metrics

Engineering and Technology

D-Index
34
Citations
4420
World Ranking
9240
National Ranking
2592

Overview

What is he best known for?

The fields of study he is best known for:

  • Operating system
  • Computer hardware
  • Computer network

Joseph M. Jeddeloh focuses on Computer hardware, Registered memory, Memory refresh, Interleaved memory and Memory map. Joseph M. Jeddeloh is interested in Memory controller, which is a field of Computer hardware. His studies in Registered memory integrate themes in fields like Memory module and Memory management.

His study on Memory refresh is covered under Computer memory. His work in Interleaved memory tackles topics such as Flat memory model which are related to areas like Uniform memory access. As part of one scientific family, Joseph M. Jeddeloh deals mainly with the area of Memory map, narrowing it down to issues related to the Memory segmentation, and often Table, Auxiliary memory and Computer graphics.

His most cited work include:

  • System and method for selective memory module power management (201 citations)
  • Timing circuit for high speed memory (126 citations)
  • System and method for self-testing and repair of memory modules (122 citations)

What are the main themes of his work throughout his whole career to date?

Computer hardware, Registered memory, Memory map, Interleaved memory and Memory refresh are his primary areas of study. His studies examine the connections between Computer hardware and genetics, as well as such issues in Embedded system, with regards to Cache. His Registered memory study combines topics from a wide range of disciplines, such as Uniform memory access, Memory management, Memory buffer register, Computer memory and Physical address.

His research investigates the connection with Memory map and areas like Computer graphics which intersect with concerns in Memory architecture. His study of Conventional memory is a part of Memory refresh. His Semiconductor memory study integrates concerns from other disciplines, such as Auxiliary memory and Electronic engineering.

He most often published in these fields:

  • Computer hardware (77.12%)
  • Registered memory (44.07%)
  • Memory map (30.51%)

What were the highlights of his more recent work (between 2008-2020)?

  • Computer hardware (77.12%)
  • Database (5.08%)
  • Semiconductor memory (28.81%)

In recent papers he was focusing on the following fields of study:

His primary areas of investigation include Computer hardware, Database, Semiconductor memory, Sense amplifier and Embedded system. His Computer hardware research is multidisciplinary, relying on both Memory interface and Printed circuit board. His work in Semiconductor memory addresses issues such as Die, which are connected to fields such as Electronic engineering, Event, Code generation and Error signal.

The Registered memory study combines topics in areas such as Memory refresh, System bus, Uniform memory access and Shared memory. Memory refresh is a subfield of Computer memory that he studies. His research in Physical address intersects with topics in Extended memory, Flat memory model, Memory management, Direct mode and Sequential logic.

Between 2008 and 2020, his most popular works were:

  • Devices and methods for operating a solid state drive (119 citations)
  • Stripe-based memory operation (110 citations)
  • Memory system and method using stacked memory device dice, and system using the memory system (90 citations)

In his most recent research, the most cited papers focused on:

  • Operating system
  • Computer network
  • Computer hardware

The scientist’s investigation covers issues in Computer hardware, Dice, Die, Solid-state drive and IOPS. His work on Memory module as part of general Computer hardware study is frequently linked to Control, bridging the gap between disciplines. His Dice research overlaps with Memory refresh, Registered memory, Correction system, Sense amplifier and Semiconductor memory.

His Die research integrates issues from Controller, Error signal, Code generation, Event and Electronic engineering. By researching both Solid-state drive and Spare part, Joseph M. Jeddeloh produces research that crosses academic boundaries.

Best Publications

  • System and method for selective memory module power management

    Joseph M. Jeddeloh;Terry Lee

  • Method for aligning a control signal and a clock signal

    Joseph M. Jeddeloh;Jeffrey J. Rooney;Richard F. Nicholson;Dean A. Klein

  • System and method for self-testing and repair of memory modules

    Joseph M. Jeddeloh

  • System and method for remapping defective memory locations

    Joseph Jeddeloh

  • Devices and methods for operating a solid state drive

    Joseph M. Jeddeloh

  • Stripe-based memory operation

    Joseph M. Jeddeloh

  • Memory hub and method for memory system performance monitoring

    Joseph M. Jeddeloh

  • Method of processing memory requests in a pipelined memory controller

    Joseph Jeddeloh

  • Memory system and method using stacked memory device dice, and system using the memory system

    Paul A. LaBerge;Joseph M. Jeddeloh;James B. Johnson

  • Method for aligning clock and data signals received from a RAM

    Joseph M. Jeddeloh

  • Apparatus for aligning clock and data signals received from a RAM

    Joseph M. Jeddeloh

  • Processing systems, memory controllers and methods for controlling memory access operations

    Joseph M. Jeddeloh

  • Buffer control system and method for a memory system having outstanding read and write request buffers

    Joseph M. Jeddeloh

  • Apparatus and methods for a physical layout of simultaneously sub-accessible memory modules

    Terry R. Lee;Joseph M. Jeddeloh

  • Method and apparatus for repairing high capacity/high bandwidth memory devices

    Paul A. LaBerge;Joseph M. Jeddeloh

  • System for remapping defective memory bit sets

    Joseph Jeddeloh

  • Method for synchronizing strobe and data signals from a RAM

    Joseph M. Jeddeloh

  • Memory bandwidth allocation based on access count priority scheme

    Joseph M. Jeddeloh;Douglas A. Larson

  • Arbitration system having a packet memory and method for memory responses in a hub-based memory system

    Joseph M. Jeddeloh

  • Multi-mode memory device and method having stacked memory dice, a logic die and a command processing circuit and operating in direct and indirect modes

    Joseph M. Jeddeloh

Frequent Co-Authors

Dean A. Klein
Dean A. Klein Micron (United States)

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