Frederick A. Ware

Overview

Best Publications

• Memory controller for non-homogeneous memory system

  Frederick A. Ware

  366
  Citations

• Method of operation of a memory device and system including initialization at a first frequency and operation at a second frequencey and a power down exit mode

  Richard M. Barth;Ely K. Tsern;Craig E. Hampel;Frederick A. Ware

  267
  Citations

• Signaling system with adaptive timing calibration

  Bret G. Stott;Craig E. Hampel;Frederick A. Ware

  246
  Citations

• Memory Systems with Multiple Modules Supporting Simultaneous Access Responsive to Common Memory Commands

  Richard E. Perego;Donald C. Stark;Frederick A. Ware;Ely K. Tsern

  238
  Citations

• Clock-forwarding memory controller with mesochronously-clocked signaling interface

  Frederick A. Ware;Robert E. Palmer;John W. Poulton;Andrew M. Fuller

  214
  Citations

• Memory Controller For Selective Rank Or Subrank Access

  Craig E. Hampel;Frederick A. Ware

  204
  Citations

• Memory device which receives write masking information

  Frederick Abbott Ware;Craig Edward Hampel;Donald Charles Stark;Matthew Murdy Griffin

  166
  Citations

• Dynamic random access memory system

  Frederick A. Ware;John B. Dillon;Richard M. Barth;Billy Wayne Garrett

  162
  Citations

• Techniques for multi-wire encoding with an embedded clock

  Frederick A. Ware;Jade Kizer

  156
  Citations

• Method and apparatus for power control in devices

  Frederick A. Ware;James A. Gasbarro;John B. Dillon;Matthew M. Griffin

  154
  Citations

• Method and apparatus for signaling between devices of a memory system

  Frederick A. Ware;Ely K. Tsern;Richard E. Perego;Craig E. Hampel

  147
  Citations

• Techniques for improved timing control of memory devices

  Frederick A. Ware;Carl Werner;Ian Shaeffer

  144
  Citations

• Low Power Memory Device

  Frederick A. Ware;Ely K. Tsern;Craig E. Hampel

  140
  Citations

• Memory component that enables calibrated command- and data-timing signal arrival

  Ware Frederick A

  140
  Citations

• Prefetching into a cache to minimize main memory access time and cache size in a computer system

  Karnamadakala Krishnamohan;Paul Michael Farmwald;Frederick Abbott Ware

  130
  Citations

• Error detection and offset cancellation during multi-wire communication

  Jade M. Kizer;John Wilson;Lei Luo;Frederick A. Ware

  124
  Citations

• Receiver for multi-wire communication with reduced input capacitance

  Frederick Ware;John Wilson;Kyung Suk Oh;Brian S. Leibowitz

  119
  Citations

• Method and apparatus for indicating mask information

  Richard M. Barth;Frederick A. Ware;Donald C. Stark;Craig E. Hampel

  118
  Citations

• Techniques for increasing bandwidth in port-per-module memory systems having mismatched memory modules

  Frederick A. Ware;Richard E. Perego;Craig E. Hampel;Ely K. Tsern

  116
  Citations

• Memory controller integrated circuit with multiple request ports and link calibration support

  Richard E. Perego;Frederick A. Ware

  116
  Citations