World's Best Scientists 2026 revealed!

D-Index & Metrics

Electronics and Electrical Engineering

D-Index
38
Citations
6415
World Ranking
4882
National Ranking
1706

Overview

What is he best known for?

The fields of study he is best known for:

  • Transistor
  • Electrical engineering
  • Integrated circuit

Wendell P. Noble mostly deals with Electrical engineering, Transistor, Memory cell, Optoelectronics and Dram. His research in the fields of Pass transistor logic, Logic gate and Programmable logic array overlaps with other disciplines such as Process. The Transistor study combines topics in areas such as Line and Integrated circuit.

Wendell P. Noble interconnects Body region, Trench, Second source, Capacitor and Flash memory in the investigation of issues within Memory cell. His Optoelectronics study combines topics from a wide range of disciplines, such as Electronic circuit and MOSFET. Dynamic random-access memory is closely connected to Silicon on insulator in his research, which is encompassed under the umbrella topic of Dram.

His most cited work include:

  • Memory cell having a vertical transistor with buried source/drain and dual gates (260 citations)
  • 4 F2 folded bit line dram cell structure having buried bit and word lines (253 citations)
  • High density flash memory (219 citations)

What are the main themes of his work throughout his whole career to date?

The scientist’s investigation covers issues in Electrical engineering, Transistor, Optoelectronics, Memory cell and Electrical conductor. His study connects Dram and Electrical engineering. His Transistor research incorporates themes from Body region, CMOS, Semiconductor and Inverter.

His Optoelectronics research integrates issues from Layer and Substrate. His Memory cell study combines topics in areas such as Sense amplifier, Dynamic random-access memory, Trench, Capacitor and Static random-access memory. His Electrical conductor research is multidisciplinary, incorporating perspectives in Engineering drawing and Engineering physics.

He most often published in these fields:

  • Electrical engineering (68.89%)
  • Transistor (54.44%)
  • Optoelectronics (42.22%)

What were the highlights of his more recent work (between 2001-2010)?

  • Electrical engineering (68.89%)
  • Transistor (54.44%)
  • Optoelectronics (42.22%)

In recent papers he was focusing on the following fields of study:

His main research concerns Electrical engineering, Transistor, Optoelectronics, Memory cell and Interconnection. The various areas that he examines in his Electrical engineering study include Silicon on insulator and Programmable logic device. His studies in Silicon on insulator integrate themes in fields like PMOS logic, CMOS, Velocity saturation and NMOS logic.

His Transistor study incorporates themes from Body region, Substrate, Bistability and Static random-access memory. His work carried out in the field of Optoelectronics brings together such families of science as Layer and Field-effect transistor. His research in Memory cell focuses on subjects like Capacitor, which are connected to Insulator and Trench.

Between 2001 and 2010, his most popular works were:

  • Trench DRAM cell with vertical device and buried word lines (205 citations)
  • Ultra high density flash memory (164 citations)
  • Circuit and method for a folded bit line memory cell with vertical transistor and trench capacitor (157 citations)

In his most recent research, the most cited papers focused on:

  • Transistor
  • Electrical engineering
  • Integrated circuit

His primary scientific interests are in Electrical engineering, Memory cell, Transistor, Body region and Capacitor. Wendell P. Noble combines subjects such as Simple programmable logic device and Macrocell array with his study of Electrical engineering. His Memory cell research includes elements of Computer hardware, Flash memory, Reading and Ultra high density.

In most of his Transistor studies, his work intersects topics such as Static random-access memory. His biological study spans a wide range of topics, including Semiconductor materials, Gate oxide, Substrate, Second source and Insulator. The concepts of his Capacitor study are interwoven with issues in Dram, Optoelectronics, Trench and Line.

Best Publications

  • Memory cell having a vertical transistor with buried source/drain and dual gates

    Wendell P. Noble;Leonard Forbes;Kie Y. Ahn

  • Memory cell with vertical transistor and buried word and body lines

    Leonard Forbes;Wendell P. Noble;Kie Y. Ahn

  • 4 F2 folded bit line dram cell structure having buried bit and word lines

    Wendell P. Noble;Leonard Forbes;Kie Y. Ahn

  • Ultra high density flash memory

    Wendell P. Noble;Leonard Forbes

  • High density flash memory

    Leonard Forbes;Wendell P. Noble

  • Trench DRAM cell with vertical device and buried word lines

    Wendell P. Noble

  • Circuit and method for an open bit line memory cell with a vertical transistor and trench plate trench capacitor

    Leonard Forbes;Wendell P. Noble

  • Circuit and method for a folded bit line memory cell with vertical transistor and trench capacitor

    Wendell P. Noble;Leonard Forbes

  • Programmable memory address decode array with vertical transistors

    Leonard Forbes;Wendell P. Noble

  • Highly conductive composite polysilicon gate for CMOS integrated circuits

    Wendell P. Noble;Leonard Forbes

  • Methods for dual-gated transistors

    Leonard Forbes;Wendell P. Noble

  • Field programmable logic arrays with vertical transistors

    Wendell P. Noble;Leonard Forbes

  • High density SRAM cell with latched vertical transistors

    Wendell P. Noble;Leonard Forbes

  • Structure and method for reducing threshold voltage variations due to dopant fluctuations

    Leonard Forbes;Wendell P. Noble

  • Method for reading a vertical gain cell and array for a dynamic random access memory

    Wendell P. Noble

  • Semiconductor structure having an optical signal path in a substrate and method for forming the same

    Wendell P. Noble

  • Programmable logic array with vertical transistors

    Wendell P. Noble;Leonard Forbes

  • Memory address decode array with vertical transistors

    Leonard Forbes;Wendell P. Noble

  • Method of forming vertical sub-micron CMOS transistors on (110), (111), (311), (511), and higher order surfaces of bulk, soi and thin film structures

    Leonard Forbes;Wendell P. Noble;Alan R. Reinberg

  • High density vertical SRAM cell using bipolar latchup induced by gated diode breakdown

    Wendell P. Noble;Leonard Forbes

Frequent Co-Authors

Leonard Forbes
Leonard Forbes L. Forbes and Associates LLC
Kie Y. Ahn
Kie Y. Ahn Micron (United States)

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