D-Index & Metrics Best Publications

D-Index & Metrics D-index (Discipline H-index) only includes papers and citation values for an examined discipline in contrast to General H-index which accounts for publications across all disciplines.

Discipline name D-index D-index (Discipline H-index) only includes papers and citation values for an examined discipline in contrast to General H-index which accounts for publications across all disciplines. Citations Publications World Ranking National Ranking
Materials Science D-index 70 Citations 20,114 225 World Ranking 1803 National Ranking 600
Electronics and Electrical Engineering D-index 74 Citations 22,503 261 World Ranking 396 National Ranking 205

Research.com Recognitions

Awards & Achievements

2007 - IEEE Fellow For applications of silicon-germanium thin films to metal oxide semiconductor transistors and microelectro mechanical systems

Overview

What is he best known for?

The fields of study he is best known for:

  • Semiconductor
  • MOSFET
  • Transistor

His scientific interests lie mostly in Optoelectronics, MOSFET, Electrical engineering, CMOS and Gate oxide. Tsu-Jae King has included themes like Metal gate, Transistor, Gate dielectric and Electronic engineering in his Optoelectronics study. His study looks at the relationship between Electronic engineering and fields such as Germanium, as well as how they intersect with chemical problems.

His research in MOSFET intersects with topics in International Technology Roadmap for Semiconductors, Silicon on insulator, Nanotechnology and Leakage. As part of one scientific family, Tsu-Jae King deals mainly with the area of Electrical engineering, narrowing it down to issues related to the Annealing, and often Fin. His CMOS research incorporates elements of Electron mobility, Nanoelectronics, Work function and Equivalent series resistance.

His most cited work include:

  • FinFET-a self-aligned double-gate MOSFET scalable to 20 nm (1336 citations)
  • Finfet transistor structures having a double gate channel extending vertically from a substrate and methods of manufacture (534 citations)
  • FinFET scaling to 10 nm gate length (507 citations)

What are the main themes of his work throughout his whole career to date?

His primary scientific interests are in Optoelectronics, Electrical engineering, MOSFET, Electronic engineering and CMOS. His Optoelectronics research integrates issues from Transistor, Gate dielectric, Gate oxide and Thin-film transistor. His study in Quantum tunnelling extends to Electrical engineering with its themes.

His work is dedicated to discovering how MOSFET, Nanotechnology are connected with Lithography and other disciplines. His study looks at the relationship between Electronic engineering and topics such as Chemical vapor deposition, which overlap with Amorphous solid. The various areas that Tsu-Jae King examines in his CMOS study include PMOS logic, NMOS logic and Work function.

He most often published in these fields:

  • Optoelectronics (68.08%)
  • Electrical engineering (34.53%)
  • MOSFET (32.90%)

What were the highlights of his more recent work (between 2003-2019)?

  • Optoelectronics (68.08%)
  • Electrical engineering (34.53%)
  • Electronic engineering (30.62%)

In recent papers he was focusing on the following fields of study:

His primary areas of study are Optoelectronics, Electrical engineering, Electronic engineering, Transistor and CMOS. His work deals with themes such as Layer, Field-effect transistor and MOSFET, which intersect with Optoelectronics. His work in the fields of Leakage, Cmos process, Voltage and Memory cell overlaps with other areas such as Differential.

His biological study spans a wide range of topics, including Substrate and Dielectric. His research in Transistor focuses on subjects like Semiconductor device fabrication, which are connected to Photolithography. His studies in CMOS integrate themes in fields like International Technology Roadmap for Semiconductors, Resonator, Gate oxide and Contact resistance.

Between 2003 and 2019, his most popular works were:

  • The end of CMOS scaling: toward the introduction of new materials and structural changes to improve MOSFET performance (298 citations)
  • Segmented channel MOS transistor (278 citations)
  • Integrated Circuit On Corrugated Substrate (224 citations)

In his most recent research, the most cited papers focused on:

  • Semiconductor
  • Integrated circuit
  • Transistor

The scientist’s investigation covers issues in Optoelectronics, Electronic engineering, Electrical engineering, Transistor and MOSFET. His Optoelectronics research includes elements of Layer, Substrate and Gate oxide. He interconnects NAND gate, Gate driver, Gate dielectric and Work function in the investigation of issues within Gate oxide.

His study in Electronic engineering is interdisciplinary in nature, drawing from both Bit, Dielectric and Charge trap flash. His work carried out in the field of Transistor brings together such families of science as Foundry and Microelectromechanical systems. His studies deal with areas such as Fin, International Technology Roadmap for Semiconductors, Nanoelectronics, Silicon on insulator and CMOS as well as MOSFET.

This overview was generated by a machine learning system which analysed the scientist’s body of work. If you have any feedback, you can contact us here.

Best Publications

FinFET-a self-aligned double-gate MOSFET scalable to 20 nm

D. Hisamoto;Wen-Chin Lee;J. Kedzierski;H. Takeuchi.
IEEE Transactions on Electron Devices (2000)

2195 Citations

FinFET-a self-aligned double-gate MOSFET scalable to 20 nm

D. Hisamoto;Wen-Chin Lee;J. Kedzierski;H. Takeuchi.
IEEE Transactions on Electron Devices (2000)

2195 Citations

Sub 50-nm FinFET: PMOS

Xuejue Huang;Wen-Chin Lee;Charles Kuo;D. Hisamoto.
international electron devices meeting (1999)

813 Citations

Sub 50-nm FinFET: PMOS

Xuejue Huang;Wen-Chin Lee;Charles Kuo;D. Hisamoto.
international electron devices meeting (1999)

813 Citations

FinFET scaling to 10 nm gate length

Bin Yu;Leland Chang;S. Ahmed;Haihong Wang.
international electron devices meeting (2002)

779 Citations

FinFET scaling to 10 nm gate length

Bin Yu;Leland Chang;S. Ahmed;Haihong Wang.
international electron devices meeting (2002)

779 Citations

Methods of designing an integrated circuit on corrugated substrate

Tsu-Jae King;Victor Moroz.
(2009)

740 Citations

Methods of designing an integrated circuit on corrugated substrate

Tsu-Jae King;Victor Moroz.
(2009)

740 Citations

Finfet transistor structures having a double gate channel extending vertically from a substrate and methods of manufacture

Chenming Hu;Tsu-Jae King;Vivek Subramanian;Leland Chang.
(2000)

686 Citations

Finfet transistor structures having a double gate channel extending vertically from a substrate and methods of manufacture

Chenming Hu;Tsu-Jae King;Vivek Subramanian;Leland Chang.
(2000)

686 Citations

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