2007 - IEEE Fellow For applications of silicon-germanium thin films to metal oxide semiconductor transistors and microelectro mechanical systems
His scientific interests lie mostly in Optoelectronics, MOSFET, Electrical engineering, CMOS and Gate oxide. Tsu-Jae King has included themes like Metal gate, Transistor, Gate dielectric and Electronic engineering in his Optoelectronics study. His study looks at the relationship between Electronic engineering and fields such as Germanium, as well as how they intersect with chemical problems.
His research in MOSFET intersects with topics in International Technology Roadmap for Semiconductors, Silicon on insulator, Nanotechnology and Leakage. As part of one scientific family, Tsu-Jae King deals mainly with the area of Electrical engineering, narrowing it down to issues related to the Annealing, and often Fin. His CMOS research incorporates elements of Electron mobility, Nanoelectronics, Work function and Equivalent series resistance.
His primary scientific interests are in Optoelectronics, Electrical engineering, MOSFET, Electronic engineering and CMOS. His Optoelectronics research integrates issues from Transistor, Gate dielectric, Gate oxide and Thin-film transistor. His study in Quantum tunnelling extends to Electrical engineering with its themes.
His work is dedicated to discovering how MOSFET, Nanotechnology are connected with Lithography and other disciplines. His study looks at the relationship between Electronic engineering and topics such as Chemical vapor deposition, which overlap with Amorphous solid. The various areas that Tsu-Jae King examines in his CMOS study include PMOS logic, NMOS logic and Work function.
His primary areas of study are Optoelectronics, Electrical engineering, Electronic engineering, Transistor and CMOS. His work deals with themes such as Layer, Field-effect transistor and MOSFET, which intersect with Optoelectronics. His work in the fields of Leakage, Cmos process, Voltage and Memory cell overlaps with other areas such as Differential.
His biological study spans a wide range of topics, including Substrate and Dielectric. His research in Transistor focuses on subjects like Semiconductor device fabrication, which are connected to Photolithography. His studies in CMOS integrate themes in fields like International Technology Roadmap for Semiconductors, Resonator, Gate oxide and Contact resistance.
The scientist’s investigation covers issues in Optoelectronics, Electronic engineering, Electrical engineering, Transistor and MOSFET. His Optoelectronics research includes elements of Layer, Substrate and Gate oxide. He interconnects NAND gate, Gate driver, Gate dielectric and Work function in the investigation of issues within Gate oxide.
His study in Electronic engineering is interdisciplinary in nature, drawing from both Bit, Dielectric and Charge trap flash. His work carried out in the field of Transistor brings together such families of science as Foundry and Microelectromechanical systems. His studies deal with areas such as Fin, International Technology Roadmap for Semiconductors, Nanoelectronics, Silicon on insulator and CMOS as well as MOSFET.
This overview was generated by a machine learning system which analysed the scientist’s body of work. If you have any feedback, you can contact us here.
FinFET-a self-aligned double-gate MOSFET scalable to 20 nm
D. Hisamoto;Wen-Chin Lee;J. Kedzierski;H. Takeuchi.
IEEE Transactions on Electron Devices (2000)
FinFET-a self-aligned double-gate MOSFET scalable to 20 nm
D. Hisamoto;Wen-Chin Lee;J. Kedzierski;H. Takeuchi.
IEEE Transactions on Electron Devices (2000)
Sub 50-nm FinFET: PMOS
Xuejue Huang;Wen-Chin Lee;Charles Kuo;D. Hisamoto.
international electron devices meeting (1999)
Sub 50-nm FinFET: PMOS
Xuejue Huang;Wen-Chin Lee;Charles Kuo;D. Hisamoto.
international electron devices meeting (1999)
FinFET scaling to 10 nm gate length
Bin Yu;Leland Chang;S. Ahmed;Haihong Wang.
international electron devices meeting (2002)
FinFET scaling to 10 nm gate length
Bin Yu;Leland Chang;S. Ahmed;Haihong Wang.
international electron devices meeting (2002)
Methods of designing an integrated circuit on corrugated substrate
Tsu-Jae King;Victor Moroz.
(2009)
Methods of designing an integrated circuit on corrugated substrate
Tsu-Jae King;Victor Moroz.
(2009)
Finfet transistor structures having a double gate channel extending vertically from a substrate and methods of manufacture
Chenming Hu;Tsu-Jae King;Vivek Subramanian;Leland Chang.
(2000)
Finfet transistor structures having a double gate channel extending vertically from a substrate and methods of manufacture
Chenming Hu;Tsu-Jae King;Vivek Subramanian;Leland Chang.
(2000)
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