World's Best Scientists 2026 revealed!

D-Index & Metrics

Engineering and Technology

D-Index
59
Citations
11616
World Ranking
2370
National Ranking
483

Research.com Recognitions

  • 2017 - Fellow, National Academy of Inventors

Overview

Bin Yu is affiliated with Southeast University in China and has a research portfolio primarily situated in the fields of engineering and materials science. Their work spans subfields such as electrical and electronic engineering, materials chemistry, artificial intelligence, biomedical engineering, and cellular and molecular neuroscience.

The scientist's main research topics include:

  • Advanced Memory and Neural Computing
  • 2D Materials and Applications
  • Ferroelectric and Negative Capacitance Devices
  • Graphene Research and Applications
  • Neuroscience and Neural Engineering
  • CCD and CMOS Imaging Sensors
  • Nanowire Synthesis and Applications

Bin Yu has published extensively in several notable venues, with recurring contributions in:

  • Advanced Materials
  • Nature Communications
  • IEEE Electron Device Letters
  • Advanced Functional Materials
  • InfoMat

The scientist has collaborated frequently with several coauthors over their career. The most frequent collaborators include:

  • Yang Xu
  • Yuda Zhao
  • Jiachao Zhou
  • Jiayang Hu
  • Srikrishna Chanakya Bodepudi

Among Bin Yu's recent papers are:

  • "2D Heterostructures for Ubiquitous Electronics and Optoelectronics: Principles, Opportunities, and Challenges" (2022), published in Chemical Reviews
  • "Graphene charge-injection photodetectors" (2022), published in Nature Electronics
  • "Unraveling the origin of ferroelectric resistance switching through the interfacial engineering of layered ferroelectric-metal junctions" (2021), published in Nature Communications
  • "Microfabrication of peptide self-assemblies: inspired by nature towards applications" (2022), published in Chemical Society Reviews
  • "Macroscopic assembled graphene nanofilms based room temperature ultrafast mid-infrared photodetectors" (2022), published in InfoMat

Bin Yu was recognized as a Fellow of the National Academy of Inventors in 2017.

Best Publications

  • MOSFET having a double gate

    Bin Yu;Eric N. Paton

  • FinFET scaling to 10 nm gate length

    Bin Yu;Leland Chang;S. Ahmed;Haihong Wang

  • Method for forming multiple structures in a semiconductor device

    Bin Yu;Judy Xilin An;Cyrus E. Tabery;HaiHong Wang

  • Formation of well-controlled thin SiO, SiN, SiON layer for multilayer high-K dielectric applications

    Eric N. Paton;Qi Xiang;Bin Yu

  • Climate sensitivity and response

    G. J. Boer;B. Yu

  • Life cycle assessment of pavement: Methodology and case study

    Bin Yu;Qing Lu

  • Method for forming fins in a FinFET device using sacrificial carbon layer

    Matthew S. Buynoski;Srikanteswara Dakshina-Murthy;Cyrus E. Tabery;HaiHong Wang

  • An analysis on the physical process of the influence of AO on ENSO

    Shangfeng Chen;Bin Yu;Wen Chen

  • Efficient semantic-based content search in P2P network

    H.T. Shen;Y. Shu;B. Yu

  • Method of manufacturing a semiconductor device having a fin structure

    Bin Yu;Shibly S. Ahmed;Judy Xilin An;Srikanteswara Dakshina-Murthy

  • The impact of combined ENSO and PDO on the PNA climate: a 1,000-year climate modeling study

    B. Yu;F. W. Zwiers

  • FinFET device with multiple fin structures

    Matthew S. Buynoski;Judy Xilin An;HaiHong Wang;Bin Yu

  • Shallow trench isolation (STI) region with high-K liner and method of formation

    Olov B. Karlsson;HaiHong Wang;Bin Yu;Zoran Krivokapic

  • Double spacer FinFET formation

    Matthew S. Buynoski;Judy Xilin An;HaiHong Wang;Bin Yu

  • Strained channel FinFET

    Srikanteswara Dakshina-Murthy;Judy Xilin An;Zoran Krivokapic;HaiHong Wang

  • Semiconductor-on-insulator (SOI) wafer having a Si/SiGe/Si active layer and method of fabrication using wafer bonding

    Bin Yu;William G. En;Judy Xilin An;Concetta E. Riccobene

  • Multi-objective optimization for asphalt pavement maintenance plans at project level: Integrating performance, cost and environment

    Bin Yu;Xingyu Gu;Fujian Ni;Rui Guo

  • 15 nm gate length planar CMOS transistor

    Bin Yu;Haihong Wang;A. Joshi;Qi Xiang

  • Molecular dynamics simulation of distribution and adhesion of asphalt components on steel slag

    Jinzhou Liu;Bin Yu;Qianzhe Hong

  • Structure and dynamics of a springtime atmospheric wave train over the North Atlantic and Eurasia

    Shangfeng Chen;Renguang Wu;Renguang Wu;Wen Chen;Kaiming Hu

  • Method for forming super-steep retrograded channel (SSRC) for cmos transistor using rapid laser annealing to reduce thermal budget

    Bin Yu

  • Double gate semiconductor device having separate gates

    Shibly S. Ahmed;Haihong Wang;Bin Yu

  • Gate engineering for deep-submicron CMOS transistors

    Bin Yu;Dong-Hyuk Ju;Wen-Chin Lee;N. Kepler

Frequent Co-Authors

Shao-Quan Liu
Shao-Quan Liu National University of Singapore
Qi Xiang
Qi Xiang Xilinx (United States)
Zoran Krivokapic
Zoran Krivokapic GlobalFoundries (United States)
Renguang Wu
Renguang Wu Zhejiang University
George J. Boer
George J. Boer Environment and Climate Change Canada
Francis W. Zwiers
Francis W. Zwiers University of Victoria
Chenming Hu
Chenming Hu University of California, Berkeley
Leland Chang
Leland Chang IBM Research - Thomas J. Watson Research Center
Tsu-Jae King
Tsu-Jae King University of California, Berkeley
Anne-Claude Gingras
Anne-Claude Gingras Lunenfeld-Tanenbaum Research Institute

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