2026 Michael Orshansky: Engineering and Technology Researcher – H-Index, Publications & Awards

Discipline name	D-Index	World Ranking	Current World Ranking	National Ranking	Current National Ranking	Publications	Citations
Engineering and Technology	36	8615	8307	2389	2216	143	6523

Overview

Michael Orshansky is affiliated with The University of Texas at Austin in the United States. Their research spans multiple areas within computer science and engineering, with a strong focus on topics related to advanced memory technologies, cryptographic implementations, hardware security, and neural computing.

Their main fields of study include:

Computer Science
Engineering

Subfields of study represented in their work cover:

Artificial Intelligence
Electrical and Electronic Engineering
Computer Vision and Pattern Recognition
Hardware and Architecture
Computational Theory and Mathematics

Michael Orshansky's research topics encompass:

Advanced Memory and Neural Computing
Cryptographic Implementations and Security
Physical Unclonable Functions (PUFs) and Hardware Security
Advanced Neural Network Applications
Ferroelectric and Negative Capacitance Devices
Quantum-Dot Cellular Automata
Cryptography and Data Security

Their recent publications include:

"Horizontal Side-Channel Vulnerabilities of Post-Quantum Key Exchange and Encapsulation Protocols," 2021, ACM Transactions on Embedded Computing Systems
"A Provably Secure Strong PUF Based on LWE: Construction and Implementation," 2022, IEEE Transactions on Computers
"Variability-Aware Training and Self-Tuning of Highly Quantized DNNs for Analog PIM," 2022, 2022 Design, Automation & Test in Europe Conference & Exhibition (DATE)
"Power-based Attacks on Spatial DNN Accelerators," 2022, ACM Journal on Emerging Technologies in Computing Systems
"A Hierarchical Classification Method for High-accuracy Instruction Disassembly with Near-field EM Measurements," 2023, ACM Transactions on Embedded Computing Systems

The frequent publication venues for Michael Orshansky's work include:

arXiv (Cornell University)
ACM Transactions on Embedded Computing Systems
IEEE Transactions on Computers
2022 Design, Automation & Test in Europe Conference & Exhibition (DATE)
ACM Journal on Emerging Technologies in Computing Systems

Collaborations have been noted with several co-authors, including:

Zihao Deng
Mohit Tiwari
Andreas Gerstlauer
Mattan Erez
Ge Li

Best Publications

Approximate computing: An emerging paradigm for energy-efficient design

Jie Han;Michael Orshansky

1241
Citations
New paradigm of predictive MOSFET and interconnect modeling for early circuit simulation

Y. Cao;T. Sato;M. Orshansky;D. Sylvester

721
Citations
Design for Manufacturability and Statistical Design: A Constructive Approach

Michael Orshansky;Sani Nassif;Duane Boning

290
Citations
A general probabilistic framework for worst case timing analysis

Michael Orshansky;Kurt Keutzer

278
Citations
BulletProof: a defect-tolerant CMP switch architecture

K. Constantinides;S. Plaza;J. Blome;B. Zhang

254
Citations
FASER: Fast Analysis of Soft Error Susceptibility for Cell-Based Designs

Bin Zhang;Wei-Shen Wang;Michael Orshansky

240
Citations
Impact of spatial intrachip gate length variability on the performance of high-speed digital circuits

M. Orshansky;L. Milor;Pinhong Chen;K. Keutzer

214
Citations
Minimization of dynamic and static power through joint assignment of threshold voltages and sizing optimization

David Nguyen;Abhijit Davare;Michael Orshansky;David Chinnery

205
Citations
An efficient algorithm for statistical minimization of total power under timing yield constraints

Murari Mani;Anirudh Devgan;Michael Orshansky

182
Citations
Modeling and synthesis of quality-energy optimal approximate adders

Jin Miao;Ku He;Andreas Gerstlauer;Michael Orshansky

162
Citations
Characterization of spatial intrafield gate CD variability, its impact on circuit performance, and spatial mask-level correction

M. Orshansky;L. Milor;Chenming Hu

142
Citations
Fast statistical timing analysis handling arbitrary delay correlations

Michael Orshansky;Arnab Bandyopadhyay

137
Citations
NBTI-aware DVFS: a new approach to saving energy and increasing processor lifetime

Mehmet Basoglu;Michael Orshansky;Mattan Erez

134
Citations
Impact of systematic spatial intra-chip gate length variability on performance of high-speed digital circuits

Michael Orshansky;Linda Milor;Pinhong Chen;Kurt Keutzer

116
Citations
Analytical modeling of SRAM dynamic stability

Bin Zhang;Ari Arapostathis;Sani Nassif;Michael Orshansky

102
Citations
A new statistical optimization algorithm for gate sizing

M. Mani;M. Orshansky

92
Citations
Joint design-time and post-silicon minimization of parametric yield loss using adjustable robust optimization

M. Mani;A.K. Singh;M. Orshansky

92
Citations
Compensating non-optical effects using electrically driven optical proximity correction

Shayak Banerjee;Kanak B. Agarwal;James A. Culp;Praveen Elakkumanan

85
Citations
Approximate logic synthesis under general error magnitude and frequency constraints

Jin Miao;Andreas Gerstlauer;Michael Orshansky

82
Citations
Minimization of dynamic and static power through joint assignment of threshold voltages and sizing optimization [logic IC design]

D. Nguyen;A. Davare;M. Orshansky;D. Chinnery

66
Citations