2022 - Research.com Rising Star of Science Award
Johann Alsmeier focuses on Optoelectronics, Electrical engineering, Semiconductor, Substrate and Dielectric. His Optoelectronics study integrates concerns from other disciplines, such as Electronic engineering and Layer, Gate oxide, Substrate, Etching. His research in Electronic engineering intersects with topics in Electrical conductor and Insulator.
Air gap and Wafer is closely connected to Trench in his research, which is encompassed under the umbrella topic of Electrical engineering. His work in Substrate addresses issues such as Perpendicular, which are connected to fields such as Blocking and Etching. His work in Dielectric tackles topics such as Silicide which are related to areas like Gate dielectric.
His primary scientific interests are in Optoelectronics, Semiconductor, Substrate, Dielectric and Electrical engineering. The study incorporates disciplines such as Layer, Trench, Semiconductor device and Electronic engineering in addition to Optoelectronics. His work on Intrinsic semiconductor as part of general Semiconductor study is frequently linked to Pedestal, bridging the gap between disciplines.
His study in Substrate is interdisciplinary in nature, drawing from both Electrical conductor, Non-volatile memory, Etching and Source lines. His study on High-κ dielectric is often connected to Fabrication, Front and Trapping as part of broader study in Dielectric. His studies deal with areas such as Silicide, Perpendicular and Thin-film transistor as well as Electrical engineering.
Johann Alsmeier spends much of his time researching Optoelectronics, Stack-based memory allocation, Substrate, Electrically conductive and Layer. A large part of his Optoelectronics studies is devoted to Semiconductor. Substrate is the subject of his research, which falls under Composite material.
His Layer research includes themes of Electrical connection and Dielectric. His Dielectric study integrates concerns from other disciplines, such as Trench and Dielectric isolation. His studies in Line integrate themes in fields like Structural engineering, Conductive materials and Dielectric layer.
His scientific interests lie mostly in Optoelectronics, Line, Electrically conductive, Layer and Multi tier. His study in the field of Dielectric is also linked to topics like Diffusion. His Line research incorporates elements of Transistor and Dielectric layer.
The concepts of his Layer study are interwoven with issues in Field-effect transistor, Doping and High voltage. Many of his Multi tier research pursuits overlap with Conductive materials and Structural engineering.
This overview was generated by a machine learning system which analysed the scientist’s body of work. If you have any feedback, you can contact us here.
Ultrahigh density vertical nand memory device and method of making thereof
Johann Alsmeier.
(2012)
Ultrahigh density vertical nand memory device and method of making thereof
Johann Alsmeier.
(2012)
Method of making an ultrahigh density vertical NAND memory device with shielding wings
Johann Alsmeier;George Samachisa.
(2013)
Method of making an ultrahigh density vertical NAND memory device with shielding wings
Johann Alsmeier;George Samachisa.
(2013)
Method of making a vertical nand device using sequential etching of multilayer stacks
Raghuveer S. Makala;Yao-Sheng Lee;Jayavel Pachamuthu;Johann Alsmeier.
(2014)
Method of making a vertical nand device using sequential etching of multilayer stacks
Raghuveer S. Makala;Yao-Sheng Lee;Jayavel Pachamuthu;Johann Alsmeier.
(2014)
3D vertical NAND and method of making thereof by front and back side processing
요한 알스마이어.
(2011)
Multilevel memory stack structure and methods of manufacturing the same
Jayavel Pachamuthu;Johann Alsmeier;Henry Chien.
(2015)
Multilevel memory stack structure and methods of manufacturing the same
Jayavel Pachamuthu;Johann Alsmeier;Henry Chien.
(2015)
Compact three dimensional vertical NAND and method of making thereof
요한 알스마이어;라구비어 에스. 마칼라;시잉 코스타;얀리 장.
(2013)
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