World's Best Scientists 2026 revealed!

D-Index & Metrics

Electronics and Electrical Engineering

D-Index
66
Citations
13774
World Ranking
1172
National Ranking
485

Overview

What is he best known for?

The fields of study he is best known for:

  • Operating system
  • Electrical engineering
  • Voltage

Roy E. Scheuerlein spends much of his time researching Memory cell, Computer hardware, Optoelectronics, NAND gate and Electronic engineering. His Memory cell research is multidisciplinary, relying on both Registered memory, Sense amplifier, Computer memory and Non-volatile memory. His Computer hardware research incorporates themes from Bit line and Reference current.

The Optoelectronics study combines topics in areas such as Electronic circuit and Antifuse, Voltage. His work deals with themes such as Memory array and String, which intersect with NAND gate. Roy E. Scheuerlein has researched Electronic engineering in several fields, including Power consumption and Semiconductor.

His most cited work include:

  • Method of making three dimensional NAND memory (297 citations)
  • NAND memory array incorporating capacitance boosting of channel regions in unselected memory cells and method for operation of same (289 citations)
  • Method for fabricating programmable memory array structures incorporating series-connected transistor strings (251 citations)

What are the main themes of his work throughout his whole career to date?

His primary scientific interests are in Memory cell, Electrical engineering, Computer hardware, Optoelectronics and Non-volatile memory. His Memory cell research includes themes of Electronic engineering, State, Electrical resistivity and conductivity and Substrate. His Electronic engineering research focuses on Word and how it connects with Electronic circuit, Line and Line.

His research investigates the connection between Computer hardware and topics such as NAND gate that intersect with problems in String. His Optoelectronics research is multidisciplinary, incorporating elements of Layer, Thin-film transistor and Bit line. His Non-volatile memory study combines topics from a wide range of disciplines, such as Substrate, Bandwidth and Computer data storage.

He most often published in these fields:

  • Memory cell (38.86%)
  • Electrical engineering (33.18%)
  • Computer hardware (31.75%)

What were the highlights of his more recent work (between 2009-2015)?

  • Non-volatile memory (27.49%)
  • Optoelectronics (28.91%)
  • Electrical engineering (33.18%)

In recent papers he was focusing on the following fields of study:

Non-volatile memory, Optoelectronics, Electrical engineering, Voltage and Memory cell are his primary areas of study. Non-volatile memory is a subfield of Computer hardware that he explores. His Optoelectronics research integrates issues from Layer, Substrate, Thin-film transistor and Electrical conductor.

His Voltage study incorporates themes from Electronic engineering, Electrical resistance and conductance and State. His study focuses on the intersection of Electronic engineering and fields such as Diode with connections in the field of Low voltage. His Memory cell research incorporates elements of Reset, Semiconductor memory, Pulse and Line.

Between 2009 and 2015, his most popular works were:

  • A 130.7mm 2 2-layer 32Gb ReRAM memory device in 24nm technology (102 citations)
  • A 130.7- $\hbox{mm}^{2}$ 2-Layer 32-Gb ReRAM Memory Device in 24-nm Technology (98 citations)
  • Programming reversible resistance switching elements (96 citations)

In his most recent research, the most cited papers focused on:

  • Electrical engineering
  • Operating system
  • Voltage

His scientific interests lie mostly in Voltage, Electrical engineering, Electronic engineering, Non-volatile memory and Optoelectronics. His research in Voltage intersects with topics in Word, State, Electrical resistivity and conductivity and Current. His research in Sense amplifier and Electrical conductor are components of Electrical engineering.

His studies in Electronic engineering integrate themes in fields like Diode, Line and Memory cell. His study on Non-volatile memory is covered under Computer hardware. His Optoelectronics research is multidisciplinary, incorporating perspectives in Line, Layer, Electrical resistance and conductance, Bit line and Pillar.

Best Publications

  • NAND memory array incorporating capacitance boosting of channel regions in unselected memory cells and method for operation of same

    En-Hsing Chen;Andrew J. Walker;Roy E. Scheuerlein;Sucheta Nallamothu

  • Method for fabricating programmable memory array structures incorporating series-connected transistor strings

    Andrew Walker;En-Hsing Chen;Sucheta Nallamothu;Roy Scheuerlein

  • Integrated circuit including memory array incorporating multiple types of NAND string structures

    Luca G. Fasoli;Roy E. Scheuerlein

  • Word line arrangement having segmented word lines

    Roy E. Scheuerlein

  • Memory array incorporating mirrored NAND strings and non-shared global bit lines within a block

    Luca G. Fasoli;Roy E. Scheuerlein;En-Hsing Chen;Sucheta Nallamothu

  • Three dimensional NAND memory

    Nima Mokhlesi;Roy Scheuerlein

  • NAND memory array incorporating multiple write pulse programming of individual memory cells and method for operation of same

    En-Hsing Chen;Andrew J. Walker;Roy E. Scheuerlein;Sucheta Nallamothu

  • Method for programming a three-dimensional memory array incorporating serial chain diode stack

    Bendik Kleveland;Roy E. Scheuerlein

  • Method for using a memory cell comprising switchable semiconductor memory element with trimmable resistance

    Tanmay Kumar;S. Brad Herner;Roy E Scheuerlein;Christopher J Petti

  • Three-dimensional memory device incorporating segmented bit line memory array

    Roy E. Scheuerlein;Alper Ilkbahar;Luca G. Fasoli

  • NICHTFLÜCHTIGE SPEICHERZELLE MIT EINEM SCHALTBAREN WIDERSTAND UND TRANSISTOR

    Scheuerlein Roy E

  • Non-volatile memory having 3d array of read/write elements with low current structures and methods thereof

    Scheuerlein Roy E

  • Multiple twin cell non-volatile memory array and logic block structure and method therefor

    Roy E. Scheuerlein;Luca Fasoli;Mark G. Johnson

  • 512-Mb PROM with a three-dimensional array of diode/antifuse memory cells

    M. Johnson;A. Al-Shamma;D. Bosch;M. Crowley

  • A 130.7- $\hbox{mm}^{2}$ 2-Layer 32-Gb ReRAM Memory Device in 24-nm Technology

    Tz-yi Liu;Tian Hong Yan;Roy Scheuerlein;Yingchang Chen

  • Programmable memory array structure incorporating series-connected transistor strings and methods for fabrication and operation of same

    Roy E Scheuerlein;Christopher Petti;Andrew J Walker;En-Hsing Chen

  • Method for reading a multi-level passive element memory cell array

    Roy E. Scheuerlein;Tyler J. Thorp;Luca G. Fasoli

  • Nonvolatile rewriteable memory cell comprising a resistivity- switching oxide or nitride and an antifuse

    Roy E. Scheuerlein

  • A 130.7mm 2 2-layer 32Gb ReRAM memory device in 24nm technology

    Tz-Yi Liu;Tian Hong Yan;R. Scheuerlein;Yingchang Chen

  • 512 Mb PROM with 8 layers of antifuse/diode cells

    M. Crowley;A. Al-Shamma;D. Bosch;M. Farmwald

Frequent Co-Authors

Luca G. Fasoli
Luca G. Fasoli Western Digital (United States)
Nima Mokhlesi
Nima Mokhlesi Western Digital (United States)
Thomas H. Lee
Thomas H. Lee Stanford University
Eliyahou Harari
Eliyahou Harari Western Digital (United States)

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