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Claudio Fiegna

Claudio Fiegna

D-Index & Metrics

Electronics and Electrical Engineering

D-Index
31
Citations
4205
World Ranking
6558
National Ranking
301

Overview

Claudio Fiegna is affiliated with the University of Bologna in Italy. Their work primarily revolves around semiconductor devices, with a particular focus on GaN-based technologies and materials. They have contributed extensively to the field of Electrical and Electronic Engineering as well as Physics and Astronomy.

The scientist's research topics cover several areas, including:

  • GaN-based semiconductor devices and materials
  • Semiconductor materials and devices
  • Silicon Carbide Semiconductor Technologies
  • Advancements in Semiconductor Devices and Circuit Design
  • Semiconductor Quantum Structures and Devices
  • Ga2O3 and related materials
  • Ferroelectric and Negative Capacitance Devices

Fiegna's publication activity is documented in the following frequent venues:

  • IEEE Transactions on Electron Devices
  • IEEE Electron Device Letters
  • Microelectronics Reliability
  • 2022 IEEE International Reliability Physics Symposium (IRPS)
  • Micromachines

Their notable papers include:

  • High-Temperature Time-Dependent Gate Breakdown of p-GaN HEMTs, 2021, IEEE Transactions on Electron Devices
  • TCAD Modeling of the Dynamic V TH Hysteresis Under Fast Sweeping Characterization in p-GaN Gate HEMTs, 2021, IEEE Transactions on Electron Devices
  • The Role of Frequency and Duty Cycle on the Gate Reliability of p-GaN HEMTs, 2022, IEEE Electron Device Letters
  • Role of the AlGaN barrier on the long-term gate reliability of power HEMTs with p-GaN gate, 2020, Microelectronics Reliability
  • Gate Reliability of p-GaN Power HEMTs Under Pulsed Stress Condition, 2022, 2022 IEEE International Reliability Physics Symposium (IRPS)

Among frequent collaborators, Claudio Fiegna has extensively coauthored with:

  • Andrea Natale Tallarico
  • M. Millesimo
  • Benoit Bakeroot
  • Niels Posthuma
  • Matteo Borga

Best Publications

  • Understanding quasi-ballistic transport in nano-MOSFETs: part I-scattering in the channel and in the drain

    P. Palestri;D. Esseni;S. Eminente;C. Fiegna

  • Analysis of Self-Heating Effects in Ultrathin-Body SOI MOSFETs by Device Simulation

    C. Fiegna;Yang Yang;E. Sangiorgi;A.G. O'Neill

  • Scaling the MOS transistor below 0.1 /spl mu/m: methodology, device structures, and technology requirements

    C. Fiegna;H. Iwai;T. Wada;M. Saito

  • Investigation of the p-GaN Gate Breakdown in Forward-Biased GaN-Based Power HEMTs

    Andrea Natale Tallarico;Steve Stoffels;Paolo Magnone;Niels Posthuma

  • Low field electron and hole mobility of SOI transistors fabricated on ultrathin silicon films for deep submicrometer technology application

    D. Esseni;M. Mastrapasqua;G.K. Celler;C. Fiegna

  • Sub-50 nm gate length n-MOSFETs with 10 nm phosphorus source and drain junctions

    M. Ono;M. Saito;T. Yoshitomi;C. Fiegna

  • A 40 nm gate length n-MOSFET

    M. Ono;M. Saito;T. Yoshitomi;C. Fiegna

  • An experimental study of mobility enhancement in ultrathin SOI transistors operated in double-gate mode

    D. Esseni;M. Mastrapasqua;G.K. Celler;C. Fiegna

  • Simple and efficient modeling of EPROM writing

    C. Fiegna;F. Venturi;M. Melanotte;E. Sangiorgi

  • PBTI in GaN-HEMTs With p-Type Gate: Role of the Aluminum Content on $\Delta V_{\mathrm {TH}}$ and Underlying Degradation Mechanisms

    Andrea Natale Tallarico;Steve Stoffels;Niels Posthuma;Paolo Magnone

  • Low field mobility of ultra-thin SOI N- and P-MOSFETs: Measurements and implications on the performance of ultra-short MOSFETs

    D. Esseni;M. Mastrapasqua;G.K. Celler;F.H. Baumann

  • An improved semi-classical Monte-Carlo approach for nano-scale MOSFET simulation

    P. Palestri;Simone Eminente;D. Esseni;Claudio Fiegna

  • A comparison of numerical solutions of the Boltzmann transport equation for high-energy electron transport silicon

    A. Abramo;L. Baudry;R. Brunetti;R. Castagne

  • Understanding quasi-ballistic transport in nano-MOSFETs: part II-Technology scaling along the ITRS

    S. Eminente;D. Esseni;P. Palestri;C. Fiegna

  • Impact of Hot Carriers on nMOSFET Variability in 45- and 65-nm CMOS Technologies

    P. Magnone;F. Crupi;N. Wils;R. Jain

  • Threshold Voltage Instability in GaN HEMTs With p-Type Gate: Mg Doping Compensation

    Andrea Natale Tallarico;Steve Stoffels;Niels Posthuma;Stefaan Decoutere

  • Simulation of self-heating effects in different SOI MOS architectures

    Marco Braccioli;G. Curatola;Y. Yang;Enrico Sangiorgi

  • Extended (1.1-2.9 eV) hot-carrier-induced photon emission in n-channel Si MOSFETs

    M. Lanzoni;E. Sangiorgi;C. Fiegna;M. Manfredi

  • Failure mode for p-GaN gates under forward gate stress with varying Mg concentration

    S. Stoffels;B. Bakeroot;T. L. Wu;D. Marcon

  • Modeling of high-energy electrons in MOS devices at the microscopic level

    C. Fiegna;E. Sangiorgi

  • Comparative analysis of the RF and noise performance of bulk and single-gate ultra-thin SOI MOSFETs by numerical simulation☆

    Simone Eminente;Marco Alessandrini;Claudio Fiegna

Frequent Co-Authors

David Esseni
David Esseni University of Udine
Pierpaolo Palestri
Pierpaolo Palestri University of Udine
Luca Selmi
Luca Selmi University of Modena and Reggio Emilia
Susanna Reggiani
Susanna Reggiani University of Bologna
Felice Crupi
Felice Crupi University of Calabria
Bruno Ricco
Bruno Ricco University of Bologna
Asen Asenov
Asen Asenov University of Glasgow
Giuseppe Iannaccone
Giuseppe Iannaccone University of Pisa

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