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Tetsuo Endoh

Tetsuo Endoh

D-Index & Metrics

Electronics and Electrical Engineering

D-Index
46
Citations
9451
World Ranking
3354
National Ranking
122

Overview

Tetsuo Endoh is affiliated with Tohoku University in Japan and has contributed extensively to the fields of Physics and Astronomy, Engineering, and Materials Science. Their research spans several specialized subfields including Atomic and Molecular Physics and Optics, Electrical and Electronic Engineering, Electronic, Optical and Magnetic Materials, Materials Chemistry, and Condensed Matter Physics.

Their work frequently addresses topics such as magnetic properties of thin films, ZnO doping and properties, advanced memory and neural computing, physics of superconductivity and magnetism, magnetic properties and applications, magnetic and transport properties of perovskites and related materials, as well as ferroelectric and negative capacitance devices.

Notable recent publications by Endoh include:

  • Dual-Port SOT-MRAM Achieving 90-MHz Read and 60-MHz Write Operations Under Field-Assistance-Free Condition (2020, IEEE Journal of Solid-State Circuits)
  • Ultimate vertical gate-all-around metal-oxide-semiconductor field-effect transistor and its three-dimensional integrated circuits (2021, Materials Science in Semiconductor Processing)
  • Scalability of Quad Interface p-MTJ for 1X nm STT-MRAM With 10-ns Low Power Write Operation, 10 Years Retention and Endurance > 10¹¹ (2020, IEEE Transactions on Electron Devices)
  • Novel Quad-Interface MTJ Technology and its First Demonstration With High Thermal Stability Factor and Switching Efficiency for STT-MRAM Beyond 2X nm (2020, IEEE Transactions on Electron Devices)
  • First Demonstration of 25-nm Quad Interface p-MTJ Device With Low Resistance-Area Product MgO and Ten Years Retention for High Reliable STT-MRAM (2021, IEEE Transactions on Electron Devices)

Endoh frequently collaborates with a number of co-authors, among whom Shoji Ikeda stands out with 33 joint works, followed by H. Honjo, Hiroshi Naganuma, Y. Saito, and Yitao Ma.

Their research is predominantly published in venues such as IEEE Transactions on Magnetics, AIP Advances, Physical Review B, IEEE Transactions on Electron Devices, and IEEE Transactions on Industrial Informatics.

Best Publications

  • Non-volatile semiconductor memory device and method of programming a non-volatile memory cell to a predetermined state

    Tetsuo Endoh;Yoshiyuki Tanaka;Seiichi Aritome;Riichiro Shirota

  • Novel ultra high density flash memory with a stacked-surrounding gate transistor (S-SGT) structured cell

    T. Endoh;K. Kinoshita;T. Tanigami;Y. Wada

  • Electrically erasable programmable read-only memory with NAND cell structure

    Tetsuo Endoh;Riichiro Shirota;Masaki Momodomi;Tomoharu Tanaka

  • Fabrication of a Nonvolatile Full Adder Based on Logic-in-Memory Architecture Using Magnetic Tunnel Junctions

    Shoun Matsunaga;Jun Hayakawa;Shoji Ikeda;Katsuya Miura;Katsuya Miura

  • Reliability issues of flash memory cells

    S. Aritome;R. Shirota;G. Hemink;T. Endoh

  • Semiconductor memory and its production process

    Tetsuo Endoh;Fujio Masuoka;Takuji Tanigami;Takashi Yokoyama

  • Electrically erasable and programmable non-volatile and multi-level memory systemn with write-verify controller

    Tetsuo Endoh;Riichiro Shirota;Kazunori Ohuchi;Ryouhei Kirisawa

  • 0.18-/spl mu/m CMOS 10-Gb/s multiplexer/demultiplexer ICs using current mode logic with tolerance to threshold voltage fluctuation

    A. Tanabe;M. Umetani;I. Fujiwara;T. Ogura

  • An Overview of Nonvolatile Emerging Memories— Spintronics for Working Memories

    Tetsuo Endoh;Hiroki Koike;Shoji Ikeda;Takahiro Hanyu

  • Standby-Power-Free Integrated Circuits Using MTJ-Based VLSI Computing

    Takahiro Hanyu;Tetsuo Endoh;Daisuke Suzuki;Hiroki Koike

  • Fast and accurate programming method for multi-level NAND EEPROMs

    G.J. Hemink;T. Tanaka;T. Endoh;S. Aritome

  • Standby-Power-Free Compact Ternary Content-Addressable Memory Cell Chip Using Magnetic Tunnel Junction Devices

    Shoun Matsunaga;Kimiyuki Hiyama;Atsushi Matsumoto;Shoji Ikeda

  • A 3.14 um 2 4T-2MTJ-cell fully parallel TCAM based on nonvolatile logic-in-memory architecture

    Shoun Matsunaga;Sadahiko Miura;Hiroaki Honjou;Keizo Kinoshita

  • Magnetic tunnel junction for nonvolatile CMOS logic

    Hideo Ohno;Tetsuo Endoh;Takahiro Hanyu;Naoki Kasai

  • A reliable bi-polarity write/erase technology in flash EEPROMs

    S. Aritome;R. Shirota;R. Kirisawa;T. Endoh

  • 10.5 A 90nm 20MHz fully nonvolatile microcontroller for standby-power-critical applications

    Noboru Sakimura;Yukihide Tsuji;Ryusuke Nebashi;Hiroaki Honjo

  • A NAND structured cell with a new programming technology for highly reliable 5 V-only flash EEPROM

    R. Kirisawa;S. Aritome;R. Nakayama;T. Endoh

  • Semiconductor device having inversion inducing gate

    Tetsuo Endoh

  • MTJ-based nonvolatile logic-in-memory circuit, future prospects and issues

    Shoun Matsunaga;Jun Hayakawa;Shoji Ikeda;Katsuya Miura

  • Semiconductor memory with gate at least partially located in recess defined in vertically oriented semiconductor layer

    Tetsuo Endoh;Fujio Masuoka;Takuji Tanigami;Takashi Yokoyama

Frequent Co-Authors

Hideo Ohno
Hideo Ohno Tohoku University
Takahiro Hanyu
Takahiro Hanyu Tohoku University
Kenji Shiraishi
Kenji Shiraishi Nagoya University
Shoji Ikeda
Shoji Ikeda Tohoku University
Tomoharu Tanaka
Tomoharu Tanaka Toshiba (Japan)
Seiichi Miyazaki
Seiichi Miyazaki Hiroshima University
Kohei M. Itoh
Kohei M. Itoh Keio University
Yasuhiro Yoshida
Yasuhiro Yoshida Hokkaido University

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