His primary areas of study are Optoelectronics, Transistor, Electrical engineering, Semiconductor and Gate oxide. His Optoelectronics study integrates concerns from other disciplines, such as Electronic engineering, Gate dielectric and MOSFET. The study incorporates disciplines such as Layer, Undercut and Electrically conductive in addition to Electronic engineering.
His work in the fields of Field-effect transistor overlaps with other areas such as Fin and Low-power electronics. The Semiconductor study combines topics in areas such as Semiconductor device and Insulator. His study looks at the relationship between Silicon and fields such as Strained silicon, as well as how they intersect with chemical problems.
Fu-Liang Yang mainly investigates Optoelectronics, Transistor, Electrical engineering, Layer and Silicon on insulator. He has included themes like Gate dielectric, Gate oxide and MOSFET in his Optoelectronics study. His Transistor research is multidisciplinary, relying on both Doping and Undercut.
His research is interdisciplinary, bridging the disciplines of Dopant and Electrical engineering. As a part of the same scientific study, Fu-Liang Yang usually deals with the Silicon, concentrating on Electronic engineering and frequently concerns with Germanium. His CMOS research focuses on subjects like Nanotechnology, which are linked to Lithography.
Fu-Liang Yang mostly deals with Optoelectronics, Nanotechnology, Electrical engineering, Silicon and CMOS. His study in the field of Doping also crosses realms of Annealing. His Nanotechnology research includes elements of Field-effect transistor, Transistor and Lithography.
As a member of one scientific family, Fu-Liang Yang mostly works in the field of Electrical engineering, focusing on Dopant and, on occasion, Sheet resistance and Wafer. His Silicon research is multidisciplinary, incorporating perspectives in Solar cell efficiency and Layer, Semiconductor structure, Semiconductor device. His MOSFET study incorporates themes from Threshold voltage and Deposition.
Fu-Liang Yang focuses on Optoelectronics, Nanotechnology, Logic gate, Electrical engineering and Nanowire. Fu-Liang Yang specializes in Optoelectronics, namely Silicon. In his work, Stress time, Reliability, Semiconductor and Lithography is strongly intertwined with Voltage, which is a subfield of Nanotechnology.
His studies in Logic gate integrate themes in fields like Node, Gate oxide and MOSFET. His MOSFET study integrates concerns from other disciplines, such as Electron mobility, Epitaxy, Defect free, Etching and Silicon on insulator. His work carried out in the field of Nanowire brings together such families of science as Layer, Cmos compatible and Semiconductor device fabrication.
This overview was generated by a machine learning system which analysed the scientist’s body of work. If you have any feedback, you can contact us here.
Effect of Top Electrode Material on Resistive Switching Properties of $\hbox{ZrO}_{2}$ Film Memory Devices
Chih-Yang Lin;Chen-Yu Wu;Chung-Yi Wu;Tzyh-Cheang Lee.
IEEE Electron Device Letters (2007)
Effect of Top Electrode Material on Resistive Switching Properties of $\hbox{ZrO}_{2}$ Film Memory Devices
Chih-Yang Lin;Chen-Yu Wu;Chung-Yi Wu;Tzyh-Cheang Lee.
IEEE Electron Device Letters (2007)
Semiconductor-on-insulator chip incorporating strained-channel partially-depleted, fully-depleted, and multiple-gate transistors
Yang Yujia;Chen Haoyu;Huang Jianchao.
(2003)
5nm-gate nanowire FinFET
Fu-Liang Yang;Di-Hong Lee;Hou-Yu Chen;Chang-Yun Chang.
symposium on vlsi technology (2004)
5nm-gate nanowire FinFET
Fu-Liang Yang;Di-Hong Lee;Hou-Yu Chen;Chang-Yun Chang.
symposium on vlsi technology (2004)
25 nm CMOS Omega FETs
Fu-Liang Yang;Hao-Yu Chen;Fang-Cheng Chen;Cheng-Chuan Huang.
international electron devices meeting (2002)
25 nm CMOS Omega FETs
Fu-Liang Yang;Hao-Yu Chen;Fang-Cheng Chen;Cheng-Chuan Huang.
international electron devices meeting (2002)
Method of forming a transistor with a strained channel
Yee-Chia Yeo;Fu-Liang Yang;Chenming Hu.
(2002)
Method of forming a transistor with a strained channel
Yee-Chia Yeo;Fu-Liang Yang;Chenming Hu.
(2002)
Sub-60mV-swing negative-capacitance FinFET without hysteresis
Kai-Shin Li;Pin-Guang Chen;Tung-Yan Lai;Chang-Hsien Lin.
international electron devices meeting (2015)
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