World's Best Scientists 2026 revealed!

D-Index & Metrics

Electronics and Electrical Engineering

D-Index
31
Citations
3539
World Ranking
6627
National Ranking
2160

Derick J. Wristers publication distribution in Electronics and Electrical Engineering in 2026

The chart shows the distribution of publications by all Research.com ranked scientists in the field of Electronics and Electrical Engineering in 2026. The highlighted bar marks where Derick J. Wristers sits on this spectrum.

34–53 publications: 24 scientists 54–73 publications: 52 scientists 74–93 publications: 114 scientists 94–113 publications: 203 scientists 114–133 publications: 269 scientists 134–153 publications: 355 scientists 154–173 publications: 403 scientists 174–193 publications: 445 scientists 194–213 publications: 430 scientists 214–233 publications: 431 scientists 234–253 publications: 399 scientists 254–273 publications: 366 scientists 274–293 publications: 335 scientists 294–313 publications: 300 scientists 314–333 publications: 276 scientists 334–353 publications: 250 scientists 354–373 publications: 214 scientists 374–393 publications: 187 scientists 394–413 publications: 152 scientists 414–433 publications: 169 scientists 434–453 publications: 147 scientists 454–473 publications: 111 scientists 474–493 publications: 117 scientists 494–513 publications: 103 scientists 514–533 publications: 99 scientists 534–553 publications: 92 scientists 554–573 publications: 75 scientists 574–593 publications: 58 scientists 594–613 publications: 69 scientists 614–633 publications: 50 scientists 634–653 publications: 62 scientists 654–673 publications: 54 scientists 674–693 publications: 44 scientists 694–713 publications: 37 scientists 714–733 publications: 28 scientists 734–753 publications: 26 scientists 754–773 publications: 26 scientists 774–793 publications: 19 scientists 794–813 publications: 23 scientists 814–833 publications: 20 scientists 834–853 publications: 16 scientists 854–873 publications: 20 scientists 874–893 publications: 11 scientists 894–913 publications: 11 scientists 914–933 publications: 16 scientists 934–953 publications: 13 scientists 954–973 publications: 10 scientists 974–993 publications: 11 scientists 994–1,013 publications: 9 scientists 1,014–1,033 publications: 9 scientists 1,034–1,053 publications: 10 scientists 1,054–1,064 publications: 6 scientists 1,065+ publications: 99 scientists
34 publications 1,065+

This scientist: 121 publications — 7th percentile

7% of scientists in this discipline score the same or lower.

The last bar groups every scientist with 1,065 publications or more.

Derick J. Wristers D-index placement in Electronics and Electrical Engineering in 2026

The chart shows the D-index (discipline H-index) distribution of Electronics and Electrical Engineering scientists ranked by Research.com in 2026. The highlighted bar marks where Derick J. Wristers sits on this spectrum.

30 D-Index: 178 scientists 31 D-Index: 257 scientists 32 D-Index: 263 scientists 33 D-Index: 262 scientists 34 D-Index: 244 scientists 35 D-Index: 236 scientists 36 D-Index: 211 scientists 37 D-Index: 220 scientists 38 D-Index: 214 scientists 39 D-Index: 214 scientists 40 D-Index: 205 scientists 41 D-Index: 187 scientists 42 D-Index: 194 scientists 43 D-Index: 201 scientists 44 D-Index: 155 scientists 45 D-Index: 189 scientists 46 D-Index: 148 scientists 47 D-Index: 160 scientists 48 D-Index: 134 scientists 49 D-Index: 130 scientists 50 D-Index: 141 scientists 51 D-Index: 156 scientists 52 D-Index: 108 scientists 53 D-Index: 130 scientists 54 D-Index: 112 scientists 55 D-Index: 97 scientists 56 D-Index: 111 scientists 57 D-Index: 102 scientists 58 D-Index: 108 scientists 59 D-Index: 120 scientists 60 D-Index: 103 scientists 61 D-Index: 93 scientists 62 D-Index: 92 scientists 63 D-Index: 74 scientists 64 D-Index: 77 scientists 65 D-Index: 73 scientists 66 D-Index: 64 scientists 67 D-Index: 69 scientists 68 D-Index: 60 scientists 69 D-Index: 39 scientists 70 D-Index: 57 scientists 71 D-Index: 59 scientists 72 D-Index: 46 scientists 73 D-Index: 49 scientists 74 D-Index: 38 scientists 75 D-Index: 35 scientists 76 D-Index: 32 scientists 77 D-Index: 35 scientists 78 D-Index: 31 scientists 79 D-Index: 22 scientists 80 D-Index: 34 scientists 81 D-Index: 31 scientists 82 D-Index: 34 scientists 83 D-Index: 23 scientists 84 D-Index: 18 scientists 85 D-Index: 30 scientists 86 D-Index: 19 scientists 87 D-Index: 19 scientists 88 D-Index: 20 scientists 89 D-Index: 8 scientists 90 D-Index: 17 scientists 91 D-Index: 7 scientists 92 D-Index: 14 scientists 93 D-Index: 9 scientists 94 D-Index: 15 scientists 95 D-Index: 10 scientists 96 D-Index: 12 scientists 97 D-Index: 10 scientists 98 D-Index: 10 scientists 99 D-Index: 12 scientists 100 D-Index: 16 scientists 101 D-Index: 5 scientists 102 D-Index: 7 scientists 103 D-Index: 7 scientists 104 D-Index: 8 scientists 105 D-Index: 9 scientists 106 D-Index: 13 scientists 107 D-Index: 4 scientists 108 D-Index: 5 scientists 109 D-Index: 10 scientists 110 D-Index: 8 scientists 111+ D-Index: 96 scientists
30 D-Index 111+

This scientist: 31 D-Index — 6th percentile

6% of scientists in this discipline score the same or lower.

The last bar groups every scientist with 111 D-Index or more.

Overview

What is he best known for?

The fields of study he is best known for:

  • Semiconductor
  • Transistor
  • Integrated circuit

Derick J. Wristers focuses on Optoelectronics, Electronic engineering, Dopant, Transistor and Layer. His Optoelectronics study incorporates themes from Electrical engineering and Gate oxide. His work in Electronic engineering addresses subjects such as Substrate, which are connected to disciplines such as Oxide and MOSFET.

His Dopant research incorporates themes from Heating element, Gate dielectric and Dielectric. His study looks at the relationship between Transistor and fields such as Annealing, as well as how they intersect with chemical problems. His work on Polysilicon depletion effect as part of his general Layer study is frequently connected to Communication channel, thereby bridging the divide between different branches of science.

His most cited work include:

  • Ultrathin oxynitride structure and process for VLSI applications (128 citations)
  • Integrated circuit gate conductor which uses layered spacers to produce a graded junction (83 citations)
  • Low temperature solid-phase epitaxy fabrication process for MOS devices built on strained semiconductor substrate (70 citations)

What are the main themes of his work throughout his whole career to date?

Optoelectronics, Electronic engineering, Layer, Transistor and Substrate are his primary areas of study. He interconnects Semiconductor device, Electrical engineering and Gate oxide in the investigation of issues within Optoelectronics. His Electronic engineering research incorporates elements of Substrate, Doping, Silicon, Ion implantation and Dielectric.

The study incorporates disciplines such as Electrical conductor, Oxide, Masking and MOSFET in addition to Layer. When carried out as part of a general Transistor research project, his work on Gate insulator is frequently linked to work in Fabrication, therefore connecting diverse disciplines of study. His work carried out in the field of Substrate brings together such families of science as Trench, Silicide and Insulator.

He most often published in these fields:

  • Optoelectronics (83.89%)
  • Electronic engineering (43.62%)
  • Layer (38.26%)

What were the highlights of his more recent work (between 2001-2007)?

  • Optoelectronics (83.89%)
  • Transistor (37.58%)
  • Semiconductor device (20.13%)

In recent papers he was focusing on the following fields of study:

His primary scientific interests are in Optoelectronics, Transistor, Semiconductor device, Electrical engineering and Semiconductor. His biological study spans a wide range of topics, including Field-effect transistor, Electronic engineering, Active layer and Gate oxide. His study brings together the fields of Layer and Electronic engineering.

The study incorporates disciplines such as Oxide, Silicon and Dielectric in addition to Layer. Nitride is closely connected to Composite number in his research, which is encompassed under the umbrella topic of Transistor. His Electrical engineering course of study focuses on Substrate and Ring oscillator and Inverter.

Between 2001 and 2007, his most popular works were:

  • Low temperature solid-phase epitaxy fabrication process for MOS devices built on strained semiconductor substrate (70 citations)
  • Semiconductor device with tensile strain silicon introduced by compressive material in a buried oxide layer (47 citations)
  • Semiconductor device formed over a multiple thickness buried oxide layer, and methods of making same (33 citations)

In his most recent research, the most cited papers focused on:

  • Semiconductor
  • Integrated circuit
  • Transistor

His primary areas of investigation include Optoelectronics, Semiconductor, Semiconductor device, Field effect and Halo. His Semiconductor study deals with the bigger picture of Electrical engineering. His research on Semiconductor device often connects related areas such as Electronic engineering.

In his study, Silicon is inextricably linked to Active layer, which falls within the broad field of Electronic engineering. His Silicon research is multidisciplinary, incorporating elements of Layer, Substrate and Masking. Field effect is frequently linked to Gate oxide in his study.

Best Publications

  • Novel process for forming reliable ultra-thin oxynitride

    Ming-Yin Hao;Robert B Ogle;Derick Wristers;オウグル・ジュニア,ロバート・ビィ

  • Integrated circuit gate conductor which uses layered spacers to produce a graded junction

    H. Jim Fulford;Mark I. Gardner;Derick J. Wristers

  • Method and apparatus for in situ anneal during ion implant

    Robert Dawson;H. Jim Fulford;Mark I. Gardner;Frederick N. Hause

  • Low temperature solid-phase epitaxy fabrication process for MOS devices built on strained semiconductor substrate

    Bin Yu;Derick J. Wristers

  • Method of making disposable channel masking for both source/drain and LDD implant and subsequent gate fabrication

    Mark I. Gardner;H. Jim Fulford;Derick J. Wristers

  • Composite gate electrode incorporating dopant diffusion-retarding barrier layer adjacent to underlying gate dielectric

    Mark I. Gardner;Robert Dawson;H. Jim Fulford;Frederick N. Hause

  • Method of making nmos and pmos devices with reduced masking steps

    Frederick N. Hause;Robert Dawson;H. Jim Fulford;Mark I. Gardner

  • Method of channel doping using diffusion from implanted polysilicon

    H. Jim Fulford;Robert Dawson;Mark I. Gardner;Frederick N. Hause

  • Method and apparatus for characterizing semiconductor device performance variations based on independent critical dimension measurements

    Anthony J. Toprac;Derick J. Wristers;Jon D. Cheek

  • Transistor with buried insulative layer beneath the channel region

    Bradley T. Moore;Robert Dawson;H. Jim Fulford;Mark I. Gardner

  • Method for fabrication of a non-symmetrical transistor

    Mark I. Gardner;Michael P. Duane;Derick J. Wristers

  • Isotropically etching sidewall spacers to be used for both an nmos source/drain implant and a pmos ldd implant

    Jon D. Cheek;Derick J. Wristers;Anthony J. Toprac

  • Method of fabricating a transistor with a dielectric underlayer and device incorporating same

    Mark I. Gardner;H. Jim Fulford;Derick J. Wristers

  • Multiple spacer formation/removal technique for forming a graded junction

    H. Jim Fulford;Mark I. Gardner;Derick J. Wristers

  • Method of processing a semiconductor wafer for controlling drive current

    H. Jim Fulford;Derick Wristers

  • Nitrogen liner beneath transistor source/drain regions to retard dopant diffusion

    Mark I. Gardner;Robert Dawson;H. Jim Fulford;Frederick N. Hause

  • Method of implanting silicon through a polysilicon gate for punchthrough control of a semiconductor device

    Mark I. Gardner;Derick J. Wristers;Robert Dawson;H. Jim Fulford

  • Ultrathin, nitrogen-containing MOSFET sidewall spacers using low-temperature semiconductor fabrication process

    Mark I. Gardner;Derick J. Wristers;Charles E. May

  • Method of forming a shallow junction by diffusion from a silicon-based spacer

    Mark I. Gardner;Robert Dawson;H. Jim Fulford;Frederick N. Hause

  • Integrated circuit having sacrificial spacers for producing graded NMOS source/drain junctions possibly dissimilar from PMOS source/drain junctions

    H. Jim Fulford;Mark I. Gardner;Derick J. Wristers

Frequent Co-Authors

Mark I. Gardner
Mark I. Gardner Micron Technology
H. Jim Fulford
H. Jim Fulford Tokyo Electron (US)

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