World's Best Scientists 2026 revealed!

D-Index & Metrics

Electronics and Electrical Engineering

D-Index
31
Citations
3539
World Ranking
6628
National Ranking
2159

Overview

What is he best known for?

The fields of study he is best known for:

  • Semiconductor
  • Transistor
  • Integrated circuit

Derick J. Wristers focuses on Optoelectronics, Electronic engineering, Dopant, Transistor and Layer. His Optoelectronics study incorporates themes from Electrical engineering and Gate oxide. His work in Electronic engineering addresses subjects such as Substrate, which are connected to disciplines such as Oxide and MOSFET.

His Dopant research incorporates themes from Heating element, Gate dielectric and Dielectric. His study looks at the relationship between Transistor and fields such as Annealing, as well as how they intersect with chemical problems. His work on Polysilicon depletion effect as part of his general Layer study is frequently connected to Communication channel, thereby bridging the divide between different branches of science.

His most cited work include:

  • Ultrathin oxynitride structure and process for VLSI applications (128 citations)
  • Integrated circuit gate conductor which uses layered spacers to produce a graded junction (83 citations)
  • Low temperature solid-phase epitaxy fabrication process for MOS devices built on strained semiconductor substrate (70 citations)

What are the main themes of his work throughout his whole career to date?

Optoelectronics, Electronic engineering, Layer, Transistor and Substrate are his primary areas of study. He interconnects Semiconductor device, Electrical engineering and Gate oxide in the investigation of issues within Optoelectronics. His Electronic engineering research incorporates elements of Substrate, Doping, Silicon, Ion implantation and Dielectric.

The study incorporates disciplines such as Electrical conductor, Oxide, Masking and MOSFET in addition to Layer. When carried out as part of a general Transistor research project, his work on Gate insulator is frequently linked to work in Fabrication, therefore connecting diverse disciplines of study. His work carried out in the field of Substrate brings together such families of science as Trench, Silicide and Insulator.

He most often published in these fields:

  • Optoelectronics (83.89%)
  • Electronic engineering (43.62%)
  • Layer (38.26%)

What were the highlights of his more recent work (between 2001-2007)?

  • Optoelectronics (83.89%)
  • Transistor (37.58%)
  • Semiconductor device (20.13%)

In recent papers he was focusing on the following fields of study:

His primary scientific interests are in Optoelectronics, Transistor, Semiconductor device, Electrical engineering and Semiconductor. His biological study spans a wide range of topics, including Field-effect transistor, Electronic engineering, Active layer and Gate oxide. His study brings together the fields of Layer and Electronic engineering.

The study incorporates disciplines such as Oxide, Silicon and Dielectric in addition to Layer. Nitride is closely connected to Composite number in his research, which is encompassed under the umbrella topic of Transistor. His Electrical engineering course of study focuses on Substrate and Ring oscillator and Inverter.

Between 2001 and 2007, his most popular works were:

  • Low temperature solid-phase epitaxy fabrication process for MOS devices built on strained semiconductor substrate (70 citations)
  • Semiconductor device with tensile strain silicon introduced by compressive material in a buried oxide layer (47 citations)
  • Semiconductor device formed over a multiple thickness buried oxide layer, and methods of making same (33 citations)

In his most recent research, the most cited papers focused on:

  • Semiconductor
  • Integrated circuit
  • Transistor

His primary areas of investigation include Optoelectronics, Semiconductor, Semiconductor device, Field effect and Halo. His Semiconductor study deals with the bigger picture of Electrical engineering. His research on Semiconductor device often connects related areas such as Electronic engineering.

In his study, Silicon is inextricably linked to Active layer, which falls within the broad field of Electronic engineering. His Silicon research is multidisciplinary, incorporating elements of Layer, Substrate and Masking. Field effect is frequently linked to Gate oxide in his study.

Best Publications

  • Novel process for forming reliable ultra-thin oxynitride

    Ming-Yin Hao;Robert B Ogle;Derick Wristers;オウグル・ジュニア,ロバート・ビィ

  • Integrated circuit gate conductor which uses layered spacers to produce a graded junction

    H. Jim Fulford;Mark I. Gardner;Derick J. Wristers

  • Method and apparatus for in situ anneal during ion implant

    Robert Dawson;H. Jim Fulford;Mark I. Gardner;Frederick N. Hause

  • Low temperature solid-phase epitaxy fabrication process for MOS devices built on strained semiconductor substrate

    Bin Yu;Derick J. Wristers

  • Method of making disposable channel masking for both source/drain and LDD implant and subsequent gate fabrication

    Mark I. Gardner;H. Jim Fulford;Derick J. Wristers

  • Composite gate electrode incorporating dopant diffusion-retarding barrier layer adjacent to underlying gate dielectric

    Mark I. Gardner;Robert Dawson;H. Jim Fulford;Frederick N. Hause

  • Method of making nmos and pmos devices with reduced masking steps

    Frederick N. Hause;Robert Dawson;H. Jim Fulford;Mark I. Gardner

  • Method of channel doping using diffusion from implanted polysilicon

    H. Jim Fulford;Robert Dawson;Mark I. Gardner;Frederick N. Hause

  • Method and apparatus for characterizing semiconductor device performance variations based on independent critical dimension measurements

    Anthony J. Toprac;Derick J. Wristers;Jon D. Cheek

  • Transistor with buried insulative layer beneath the channel region

    Bradley T. Moore;Robert Dawson;H. Jim Fulford;Mark I. Gardner

  • Method for fabrication of a non-symmetrical transistor

    Mark I. Gardner;Michael P. Duane;Derick J. Wristers

  • Isotropically etching sidewall spacers to be used for both an nmos source/drain implant and a pmos ldd implant

    Jon D. Cheek;Derick J. Wristers;Anthony J. Toprac

  • Method of fabricating a transistor with a dielectric underlayer and device incorporating same

    Mark I. Gardner;H. Jim Fulford;Derick J. Wristers

  • Multiple spacer formation/removal technique for forming a graded junction

    H. Jim Fulford;Mark I. Gardner;Derick J. Wristers

  • Method of processing a semiconductor wafer for controlling drive current

    H. Jim Fulford;Derick Wristers

  • Nitrogen liner beneath transistor source/drain regions to retard dopant diffusion

    Mark I. Gardner;Robert Dawson;H. Jim Fulford;Frederick N. Hause

  • Method of implanting silicon through a polysilicon gate for punchthrough control of a semiconductor device

    Mark I. Gardner;Derick J. Wristers;Robert Dawson;H. Jim Fulford

  • Ultrathin, nitrogen-containing MOSFET sidewall spacers using low-temperature semiconductor fabrication process

    Mark I. Gardner;Derick J. Wristers;Charles E. May

  • Method of forming a shallow junction by diffusion from a silicon-based spacer

    Mark I. Gardner;Robert Dawson;H. Jim Fulford;Frederick N. Hause

  • Integrated circuit having sacrificial spacers for producing graded NMOS source/drain junctions possibly dissimilar from PMOS source/drain junctions

    H. Jim Fulford;Mark I. Gardner;Derick J. Wristers

Frequent Co-Authors

Mark I. Gardner
Mark I. Gardner Micron Technology
H. Jim Fulford
H. Jim Fulford Tokyo Electron (US)

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