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Douglas A. Buchanan

Douglas A. Buchanan

D-Index & Metrics

Electronics and Electrical Engineering

D-Index
36
Citations
9023
World Ranking
5243
National Ranking
235

Research.com Recognitions

  • The Canadian Academy of Engineering
  • The Canadian Academy of Engineering
  • The Canadian Academy of Engineering
  • The Canadian Academy of Engineering
  • The Canadian Academy of Engineering
  • The Canadian Academy of Engineering

Best Publications

  • CMOS scaling into the nanometer regime

    Yuan Taur;D.A. Buchanan;Wei Chen;D.J. Frank

  • Quantum-mechanical modeling of electron tunneling current from the inversion layer of ultra-thin-oxide nMOSFET's

    S.-H. Lo;D.A. Buchanan;Y. Taur;W. Wang

  • Scaling the gate dielectric: materials, integration, and reliability

    D. A. Buchanan

  • Ultrathin high-K metal oxides on silicon: processing, characterization and integration issues

    E.P Gusev;E Cartier;D.A Buchanan;M Gribelyuk

  • Volatile and non-volatile memories in silicon with nano-crystal storage

    S. Tiwari;F. Rana;K. Chan;H. Hanafi

  • Ultrathin high-K gate stacks for advanced CMOS devices

    E.P. Gusev;D.A. Buchanan;E. Cartier;A. Kumar

  • Modeling and characterization of quantization, polysilicon depletion, and direct tunneling effects in MOSFETs with ultrathin oxides

    S.-H. Lo;D. A. Buchanan;Y. Taur

  • Anode hole injection and trapping in silicon dioxide

    D. J. DiMaria;E. Cartier;D. A. Buchanan

  • Self‐consistent modeling of accumulation layers and tunneling currents through very thin oxides

    Farhan Rana;Sandip Tiwari;D. A. Buchanan

  • Interface and bulk trap generation in metal‐oxide‐semiconductor capacitors

    D. A. Buchanan;D. J. DiMaria

  • CMOS scaling into the 21st century: 0.1 mm and beyond

    Y. Taur;Y.-J. Mii;D. J. Frank;H.-S. Wong

  • 80 nm polysilicon gated n-FETs with ultra-thin Al/sub 2/O/sub 3/ gate dielectric for ULSI applications

    D.A. Buchanan;E.P. Gusev;E. Cartier;H. Okorn-Schmidt

  • Unpinned gallium oxide/GaAs interface by hydrogen and nitrogen surface plasma treatment

    A. Callegari;P. D. Hoh;D. A. Buchanan;D. Lacey

  • Interfacial oxidation process for high-k gate dielectric process integration

    Arne W. Ballantine;Douglas A. Buchanan;Eduard A. Cartier;Kevin K. Chan

  • Interface states induced by the presence of trapped holes near the silicon–silicon‐dioxide interface

    D. J. DiMaria;D. A. Buchanan;J. H. Stathis;R. E. Stahlbush

  • Process options of forming silicided metal gates for advanced CMOS devices

    Ricky S. Amos;Douglas A. Buchanan;Cyril Cabral;Evgeni P. Gousev

  • Hot-electron-induced hydrogen redistribution and defect generation in metal-oxide-semiconductor capacitors

    D. A. Buchanan;A. D. Marwick;D. J. DiMaria;L. Dori

  • Reliability and integration of ultra-thin gate dielectrics for advanced CMOS

    D.A. Buchanan;S.-H. Lo

  • Coulombic and neutral trapping centers in silicon dioxide.

    D. A. Buchanan;M. V. Fischetti;D. J. Dimaria

  • Low‐temperature deposition of silicon dioxide films from electron cyclotron resonant microwave plasmas

    T. V. Herak;T. T. Chau;D. J. Thomson;S. R. Mejia

  • Fabrication of midgap metal gates compatible with ultrathin dielectrics

    D. A. Buchanan;F. R. McFeely;J. J. Yurkas

Frequent Co-Authors

Eduard A. Cartier
Eduard A. Cartier IBM (United States)
Evgeni Gusev
Evgeni Gusev Qualcomm (United States)
Matthew Copel
Matthew Copel IBM (United States)
Yuan Taur
Yuan Taur University of California, San Diego
James H. Stathis
James H. Stathis IBM (United States)
Fuad E. Doany
Fuad E. Doany IBM (United States)
Supratik Guha
Supratik Guha Argonne National Laboratory
Sampath Purushothaman
Sampath Purushothaman IBM (United States)
Stephen A. Campbell
Stephen A. Campbell University of Minnesota
Wayne L. Gladfelter
Wayne L. Gladfelter University of Minnesota

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