Diane C. Boyd

Best Publications

• Extension and source/drain design for high-performance FinFET devices

  J. Kedzierski;Meikei Ieong;E. Nowak;T.S. Kanarsky

  391
  Citations

• Characteristics and device design of sub-100 nm strained Si N- and PMOSFETs

  K. Rim;J. Chu;H. Chen;K.A. Jenkins

  390
  Citations

• High performance CMOS fabricated on hybrid substrate with different crystal orientations

  M. Yang;M. Ieong;L. Shi;K. Chan

  354
  Citations

• High-performance symmetric-gate and CMOS-compatible V/sub t/ asymmetric-gate FinFET devices

  J. Kedzierski;D.M. Fried;E.J. Nowak;T. Kanarsky

  288
  Citations

• Metal-gate FinFET and fully-depleted SOI devices using total gate silicidation

  J. Kedzierski;E. Nowak;T. Kanarsky;Y. Zhang

  282
  Citations

• Fabrication and mobility characteristics of ultra-thin strained Si directly on insulator (SSDOI) MOSFETs

  K. Rim;K. Chan;L. Shi;D. Boyd

  253
  Citations

• Electrical integrity of state-of-the-art 0.13 /spl mu/m SOI CMOS devices and circuits transferred for three-dimensional (3D) integrated circuit (IC) fabrication

  K.W. Guarini;A.W. Topol;M. Ieong;R. Yu

  240
  Citations

• Method for forming mosfet device

  Diane Catherine Boyd;Hussein Ibrahim Hanafi;Meikei Ieong;Wesley Charles Natzle

  230
  Citations

• Hybrid planar and FinFET CMOS devices

  Bruce B. Doris;Diane C. Boyd;Meikei Ieong;Thomas S. Kanarsky

  222
  Citations

• Method for manufacturing ultra thin body field effect transistor (fet) and ultra-thin body fet device (ultra-thin body super-steep retrograde well (ssrw) fet device) manufactured by the same

  C Boyd Daine;Judson R Holt;Meikei Leong;Renee T Mo

  186
  Citations

• Performance dependence of CMOS on silicon substrate orientation for ultrathin oxynitride and HfO 2 gate dielectrics

  Min Yang;E.P. Gusev;Meikei Ieong;O. Gluschenkov

  174
  Citations

• Fully-depleted SOI MOSFETs with low source and drain resistance and minimal overlap capacitance using a recessed channel damascene gate process

  Hussein I. Hanafi;Diane C. Boyd;Kevin K. Chan;Wesley Natzle

  160
  Citations

• High performance CMOS device structure with mid-gap metal gate

  Anda C. Mocuta;Meikei Ieong;Ricky S. Amos;Diane C. Boyd

  136
  Citations

• Strained Si CMOS (SS CMOS) technology: Opportunities and challenges

  K. Rim;R. Anderson;D. Boyd;F. Cardone

  129
  Citations

• Two gates are better than one [double-gate MOSFET process]

  P.M. Solomon;K.W. Guarini;Y. Zhang;K. Chan

  120
  Citations

• High-performance high-κ/metal gates for 45nm CMOS and beyond with gate-first processing

  M. Chudzik;B. Doris;R. Mo;J. Sleight

  117
  Citations

• Stressed semiconductor device structures having granular semiconductor material

  Bruce B. Doris;Michael P. Belyansky;Diane C. Boyd;Dureseti Chidambarrao

  107
  Citations

• Threshold voltage control in NiSi-gated MOSFETs through silicidation induced impurity segregation (SIIS)

  J. Kedzierski;D. Boyd;P. Ronsheim;S. Zafar

  107
  Citations

• Triple-self-aligned, planar double-gate MOSFETs: devices and circuits

  K.W. Guarini;P.M. Solomon;Y. Zhang;K.K. Chan

  106
  Citations

• RESIST IMAGE REVERSAL PROCESS AND INTEGRATED CIRCUIT CHIP THEREOF

  Void Dian C;Furukawa Tosiharu;Homes Steven J;Ma William H

  92
  Citations