Chris H. Kim spends much of his time researching Electronic engineering, Transistor, CMOS, PMOS logic and Leakage. He works mostly in the field of Electronic engineering, limiting it down to concerns involving Low-power electronics and, occasionally, Subthreshold conduction. His studies deal with areas such as Optoelectronics, Dielectric, Nanotechnology and Printed electronics as well as Transistor.
His CMOS research incorporates themes from Electronic circuit and Logic gate. His work deals with themes such as Negative-bias temperature instability, Amplifier, NMOS logic and eDRAM, which intersect with PMOS logic. His research integrates issues of Reliability, Circuit reliability and Chip in his study of Negative-bias temperature instability.
Electronic engineering, CMOS, Electrical engineering, Transistor and Chip are his primary areas of study. The various areas that Chris H. Kim examines in his Electronic engineering study include Voltage, Electronic circuit, Reliability and Leakage. His work in CMOS covers topics such as Logic gate which are related to areas like Dram.
His Transistor study integrates concerns from other disciplines, such as Optoelectronics and Nanotechnology. As a part of the same scientific study, Chris H. Kim usually deals with the Chip, concentrating on Computer hardware and frequently concerns with Artificial neural network. His Static random-access memory study combines topics in areas such as eDRAM and Cache.
His main research concerns Chip, Electronic engineering, CMOS, Voltage and Artificial neural network. The study incorporates disciplines such as NAND gate, Embedded system and Electromigration in addition to Chip. His Electronic engineering research is multidisciplinary, incorporating perspectives in Transistor, Electronic circuit and Comparator, Successive approximation ADC.
His biological study spans a wide range of topics, including Static random-access memory and Integrated circuit. Within one scientific family, Chris H. Kim focuses on topics pertaining to Soft error under CMOS, and may sometimes address concerns connected to Combinational logic and Logic gate. His Voltage research is classified as research in Electrical engineering.
Chris H. Kim mainly focuses on Voltage, Embedded system, Physical unclonable function, Electronic engineering and CMOS. His Voltage research is multidisciplinary, relying on both Optoelectronics and Spintronics. Chris H. Kim has included themes like Energy and Computer hardware in his Embedded system study.
Electronic engineering is frequently linked to Phase detector in his study. His CMOS research incorporates elements of AND gate, Energy harvesting and Logic gate. In the field of Electrical engineering, his study on Electronics overlaps with subjects such as Cryptographic protocol.
This overview was generated by a machine learning system which analysed the scientist’s body of work. If you have any feedback, you can contact us here.
Printed, sub-3V digital circuits on plastic from aqueous carbon nanotube inks.
Mingjing Ha;Yu Xia;Alexander A. Green;Wei Zhang.
ACS Nano (2010)
Silicon Odometer: An On-Chip Reliability Monitor for Measuring Frequency Degradation of Digital Circuits
Tae-Hyoung Kim;R. Persaud;C.H. Kim.
symposium on vlsi circuits (2007)
Impact of NBTI on SRAM Read Stability and Design for Reliability
Sanjay V. Kumar;Chris H. Kim;Sachin S. Sapatnekar.
international symposium on quality electronic design (2006)
An On-Chip NBTI Sensor for Measuring pMOS Threshold Voltage Degradation
John Keane;Tae-Hyoung Kim;Chris H Kim.
IEEE Transactions on Very Large Scale Integration Systems (2010)
A Scaling Roadmap and Performance Evaluation of In-Plane and Perpendicular MTJ Based STT-MRAMs for High-Density Cache Memory
Ki Chul Chun;Hui Zhao;Jonathan D. Harms;Tae-Hyoung Kim.
IEEE Journal of Solid-state Circuits (2013)
NBTI-aware synthesis of digital circuits
Sanjay V. Kumar;Chris H. Kim;Sachin S. Sapatnekar.
design automation conference (2007)
An analytical model for negative bias temperature instability
Sanjay V. Kumar;Chris H. Kim;Sachin S. Sapatnekar.
international conference on computer aided design (2006)
A 0.2 V, 480 kb Subthreshold SRAM With 1 k Cells Per Bitline for Ultra-Low-Voltage Computing
Tae-Hyoung Kim;J. Liu;J. Keane;C.H. Kim.
IEEE Journal of Solid-state Circuits (2008)
Aerosol jet printed, low voltage, electrolyte gated carbon nanotube ring oscillators with sub-5 μs stage delays.
Mingjing Ha;Jung Woo T. Seo;Pradyumna L. Prabhumirashi;Wei Zhang.
Nano Letters (2013)
An All-In-One Silicon Odometer for Separately Monitoring HCI, BTI, and TDDB
J. Keane;Xiaofei Wang;D. Persaud;C.H. Kim.
IEEE Journal of Solid-state Circuits (2010)
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