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Computer Science

D-Index
38
Citations
8149
World Ranking
10065
National Ranking
4244

Overview

Ronald G. Dreslinski is affiliated with the University of Michigan-Ann Arbor in the United States. Their research focuses on a broad range within computer science and engineering, particularly emphasizing electrical and electronic engineering and hardware and architecture. Their expertise extends to computer networks and communications, artificial intelligence, and computer vision and pattern recognition.

The scientist has contributed to topics such as parallel computing and optimization techniques, interconnection networks and systems, embedded systems design techniques, real-time systems scheduling, low-power high-performance VLSI design, handwritten text recognition techniques, and advanced graph neural networks.

Ronald G. Dreslinski's publication history includes several recent papers:

  • Applications of Artificial Intelligence on the Modeling and Optimization for Analog and Mixed-Signal Circuits: A Review, 2021, published in IEEE Transactions on Circuits and Systems I Regular Papers
  • AnGeL: Fully-Automated Analog Circuit Generator Using a Neural Network Assisted Semi-Supervised Learning Approach, 2023, published in IEEE Transactions on Circuits and Systems I Regular Papers
  • F1: A Fast and Programmable Accelerator for Fully Homomorphic Encryption (Extended Version), 2021, published on arXiv (Cornell University)
  • Tablext: A combined neural network and heuristic based table extractor, 2022, published in Array
  • A 7.3 M Output Non-Zeros/J, 11.7 M Output Non-Zeros/GB Reconfigurable Sparse Matrix-Matrix Multiplication Accelerator, 2020, published in IEEE Journal of Solid-State Circuits

The scientist frequently publishes in venues such as:

  • arXiv (Cornell University)
  • IEEE Journal of Solid-State Circuits
  • Zenodo (CERN European Organization for Nuclear Research)
  • IEEE Transactions on Circuits and Systems I Regular Papers
  • ACM Journal on Emerging Technologies in Computing Systems

Ronald G. Dreslinski collaborates regularly with several researchers, including:

  • Morteza Fayazi
  • Trevor Mudge
  • David Blaauw
  • Nishil Talati
  • Subhankar Pal

Best Publications

  • The M5 Simulator: Modeling Networked Systems

    N.L. Binkert;R.G. Dreslinski;L.R. Hsu;K.T. Lim

  • Near-Threshold Computing: Reclaiming Moore's Law Through Energy Efficient Integrated Circuits

    R.G. Dreslinski;M. Wieckowski;D. Blaauw;D. Sylvester

  • A survey of multicore processors

    G. Blake;R.G. Dreslinski;T. Mudge

  • Sirius: An Open End-to-End Voice and Vision Personal Assistant and Its Implications for Future Warehouse Scale Computers

    Johann Hauswald;Michael A. Laurenzano;Yunqi Zhang;Cheng Li

  • PicoServer: using 3D stacking technology to enable a compact energy efficient chip multiprocessor

    Taeho Kgil;Shaun D'Souza;Ali Saidi;Nathan Binkert

  • OuterSPACE: An Outer Product Based Sparse Matrix Multiplication Accelerator

    Subhankar Pal;Jonathan Beaumont;Dong-Hyeon Park;Aporva Amarnath

  • Full-system analysis and characterization of interactive smartphone applications

    Anthony Gutierrez;Ronald G. Dreslinski;Thomas F. Wenisch;Trevor Mudge

  • F1: A Fast and Programmable Accelerator for Fully Homomorphic Encryption

    Nikola Samardzic;Axel Feldmann;Aleksandar Krastev;Srinivas Devadas

  • Composite Cores: Pushing Heterogeneity Into a Core

    Andrew Lukefahr;Shruti Padmanabha;Reetuparna Das;Faissal M. Sleiman

  • DjiNN and Tonic: DNN as a service and its implications for future warehouse scale computers

    Johann Hauswald;Yiping Kang;Michael A. Laurenzano;Quan Chen

  • Catnap: energy proportional multiple network-on-chip

    Reetuparna Das;Satish Narayanasamy;Sudhir K. Satpathy;Ronald G. Dreslinski

  • Sources of Error in Full-System Simulation

    Anthony Gutierrez;Joseph Pusdesris;Ronald G. Dreslinski;Trevor N. Mudge

  • Evolution of thread-level parallelism in desktop applications

    Geoffrey Blake;Ronald G. Dreslinski;Trevor Mudge;Krisztián Flautner

  • Energy efficient near-threshold chip multi-processing

    Bo Zhai;Ronald G. Dreslinski;David Blaauw;Trevor Mudge

  • Adrenaline: Pinpointing and reining in tail queries with quick voltage boosting

    Chang-Hong Hsu;Yunqi Zhang;Michael A. Laurenzano;David Meisner

  • Centip3De: A 3930DMIPS/W configurable near-threshold 3D stacked system with 64 ARM Cortex-M3 cores

    David Fick;Ronald G. Dreslinski;Bharan Giridhar;Gyouho Kim

  • The Celerity Open-Source 511-Core RISC-V Tiered Accelerator Fabric: Fast Architectures and Design Methodologies for Fast Chips

    Scott Davidson;Shaolin Xie;Christopher Torng;Khalid Al-Hawai

  • 14.7 A 288µW programmable deep-learning processor with 270KB on-chip weight storage using non-uniform memory hierarchy for mobile intelligence

    Suyoung Bang;Jingcheng Wang;Ziyun Li;Cao Gao

  • Swizzle-Switch Networks for Many-Core Systems

    K. Sewell;R. G. Dreslinski;T. Manville;S. Satpathy

  • Sparse-TPU: adapting systolic arrays for sparse matrices

    Xin He;Subhankar Pal;Aporva Amarnath;Siying Feng

  • Exploring DRAM organizations for energy-efficient and resilient exascale memories

    Bharan Giridhar;Michael Cieslak;Deepankar Duggal;Ronald Dreslinski

Frequent Co-Authors

Trevor Mudge
Trevor Mudge University of Michigan–Ann Arbor
David Blaauw
David Blaauw University of Michigan–Ann Arbor
Dennis Sylvester
Dennis Sylvester University of Michigan–Ann Arbor
Chaitali Chakrabarti
Chaitali Chakrabarti Arizona State University
Reetuparna Das
Reetuparna Das University of Michigan–Ann Arbor
Thomas F. Wenisch
Thomas F. Wenisch University of Michigan–Ann Arbor
Scott Mahlke
Scott Mahlke University of Michigan–Ann Arbor
Yoonmyung Lee
Yoonmyung Lee Sungkyunkwan University
Steven K. Reinhardt
Steven K. Reinhardt Advanced Micro Devices (United States)
Jason Mars
Jason Mars University of Michigan–Ann Arbor

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