World's Best Scientists 2026 revealed!

D-Index & Metrics

Electronics and Electrical Engineering

D-Index
47
Citations
7632
World Ranking
3269
National Ranking
1216

Overview

What is he best known for?

The fields of study he is best known for:

  • Semiconductor
  • Integrated circuit
  • Electrical engineering

The scientist’s investigation covers issues in Optoelectronics, Layer, Dielectric, Electronic engineering and Electrical engineering. His studies deal with areas such as Dynamic random-access memory and Substrate as well as Optoelectronics. His Layer research entails a greater understanding of Composite material.

As a part of the same scientific study, he usually deals with the Dielectric, concentrating on Barrier layer and frequently concerns with Contact resistance. The study incorporates disciplines such as Thin film, Surface area, Semiconductor device and Deposition in addition to Electronic engineering. His study in Electrical engineering is interdisciplinary in nature, drawing from both Dram and Vacuum variable capacitor.

His most cited work include:

  • High dielectric constant capacitor and method of manufacture (231 citations)
  • Chemical vapor deposition using organometallic precursors (218 citations)
  • Process for fabricating a DRAM array having feature widths that transcend the resolution limit of available photolithography (186 citations)

What are the main themes of his work throughout his whole career to date?

Pierre C. Fazan spends much of his time researching Optoelectronics, Layer, Electrical engineering, Electronic engineering and Dielectric. His work on Dram and Silicon as part of his general Optoelectronics study is frequently connected to Fabrication and Node, thereby bridging the divide between different branches of science. His research integrates issues of Wafer and Oxide in his study of Layer.

His Electrical engineering research is multidisciplinary, incorporating perspectives in Node, Gate dielectric and Memory cell. His Electronic engineering study integrates concerns from other disciplines, such as Semiconductor device, Annealing, Doping and Thin-film transistor. His biological study deals with issues like Titanium, which deal with fields such as Chemical vapor deposition.

He most often published in these fields:

  • Optoelectronics (62.34%)
  • Layer (37.01%)
  • Electrical engineering (35.06%)

What were the highlights of his more recent work (between 2004-2021)?

  • Optoelectronics (62.34%)
  • Dram (23.38%)
  • Electrical engineering (35.06%)

In recent papers he was focusing on the following fields of study:

His primary scientific interests are in Optoelectronics, Dram, Electrical engineering, Electronic engineering and Metal gate. In general Optoelectronics study, his work on CMOS often relates to the realm of Grain boundary, thereby connecting several areas of interest. His Electrical engineering study combines topics from a wide range of disciplines, such as Body region, Gate dielectric and Memory cell.

His Electronic engineering research includes themes of Annealing, Passivation, Semiconductor, Layer by layer and Fluorine. His High-κ dielectric study incorporates themes from Barrier layer, Oxide, Composite material and Nitride. His Oxide research integrates issues from Layer and Hot-carrier injection.

Between 2004 and 2021, his most popular works were:

  • A Low-Power HKMG CMOS Platform Compatible With Dram Node 2× and Beyond (11 citations)
  • Manufacturing process for zero-capacitor random access memory circuits (11 citations)
  • Low-power DRAM-compatible Replacement Gate High-k/Metal Gate Stacks (10 citations)

In his most recent research, the most cited papers focused on:

  • Semiconductor
  • Integrated circuit
  • Electrical engineering

His main research concerns Electrical engineering, Optoelectronics, Dram, CMOS and PMOS logic. His Electrical engineering research incorporates elements of Etching, Transistor array, Common drain and Lithography. Pierre C. Fazan does research in Optoelectronics, focusing on Silicon on insulator specifically.

His research in CMOS focuses on subjects like Gate equivalent, which are connected to Electronic engineering, Electronic circuit and MOSFET. In his work, Tin and High-κ dielectric is strongly intertwined with Metal gate, which is a subfield of PMOS logic. His Gate oxide study is concerned with Layer in general.

Best Publications

  • High dielectric constant capacitor and method of manufacture

    Gurtej Sandhu;Pierre Fazan

  • Capacitor compatible with high dielectric constant materials having two independent insulative layers and the method for forming same

    Pierre C. Fazan;Gurtej S. Sandhu

  • Process for fabricating a DRAM array having feature widths that transcend the resolution limit of available photolithography

    Tyler A. Lowrey;Randal W. Chance;D. Mark Durcan;Ruojia Lee

  • Method of deposting uniform dielectric film deposition on textured surfaces

    Klaus F. Schuegraf;Pierre C. Fazan

  • Method for forming a storage cell capacitor compatible with high dielectric constant materials

    Pierre C. Fazan;Viju K. Mathews

  • Capacitor compatible with high dielectric constant materials having a low contact resistance layer and the method for forming same

    Gurtej S. Sandhu;Pierre C. Fazan

  • Method of forming a Ta2O5 dielectric layer, method of forming a capacitor having a Ta2O5 dielectric layer, and capacitor construction

    Gurtej S. Sandhu;Pierre C. Fazan

  • Method for forming capacitor compatible with high dielectric constant materials having a low contact resistance layer

    Gurtej S. Sandhu;Pierre C. Fazan

  • Method of trench isolation using spacers to form isolation trenches with protected corners

    Pierre C. Fazan;Martin C. Roberts;Gurtej S. Sandhu

  • Method for formation of a stacked capacitor

    Yauh-Ching Liu;Pierre Fazan;Hiang Chan;Howard E. Rhodes

  • Process to manufacture crown stacked capacitor structures with HSG-rugged polysilicon on all sides of the storage node

    Pierre Fazan;Viju Mathews

  • Process for fabricating a cup-shaped DRAM capacitor using a multi-layer partly-sacrificial stack

    Pierre C. Fazan;Thomas A. Figura

  • Method of fabricating a contact structure having a composite barrier layer between a platinum layer and a polysilicon plug

    Paul J. Schuele;Pierre C. Fazan

  • CMOS compatible fully integrated Mach-Zehnder interferometer in SOI technology

    P. Dainesi;A. Kung;M. Chabloz;A. Lagos

  • Scalable high dielectric constant capacitor

    Pierre C. Fazan;Paul Schuele

  • Barrier layers for ferroelectric and pzt dielectric on silicon

    Gurtej S. Sandhu;Pierre Fazan

  • Double DRAM cell

    Pierre C. Fazan;Hiang C. Chan;Yauh-Ching Liu;Gurtej S. Sandhu

  • Process for creating fully-recessed field isolation regions by oxidizing a selectively-grown epitaxial silicon layer

    Hiang C. Chan;Pierre C. Fazan

  • Method for forming n-type conducting and p-type conducting gates in a layer of polycrystalline silicon

    Iii Roy L Maddox;Viju K Mathews;Pierre C Fazan

  • High performance thin film transistor (TFT) by solid phase epitaxial regrowth

    Gurtej S. Sandhu;Pierre Fazan

Frequent Co-Authors

Gurtej S. Sandhu
Gurtej S. Sandhu Micron (United States)
Charles H. Dennison
Charles H. Dennison Intel (United States)
Howard E. Rhodes
Howard E. Rhodes Micron (United States)
Brent Keeth
Brent Keeth Micron (United States)
Aaron Thean
Aaron Thean National University of Singapore
Tyler A. Lowrey
Tyler A. Lowrey Independent Scientist / Consultant, US
Eddy Simoen
Eddy Simoen Ghent University
Fernando Gonzalez
Fernando Gonzalez Micron (United States)

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