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Paul S. Andry publication distribution in Electronics and Electrical Engineering in 2026

The chart shows the distribution of publications by all Research.com ranked scientists in the field of Electronics and Electrical Engineering in 2026. The highlighted bar marks where Paul S. Andry sits on this spectrum.

34–53 publications: 24 scientists 54–73 publications: 52 scientists 74–93 publications: 114 scientists 94–113 publications: 203 scientists 114–133 publications: 269 scientists 134–153 publications: 355 scientists 154–173 publications: 403 scientists 174–193 publications: 445 scientists 194–213 publications: 430 scientists 214–233 publications: 431 scientists 234–253 publications: 399 scientists 254–273 publications: 366 scientists 274–293 publications: 335 scientists 294–313 publications: 300 scientists 314–333 publications: 276 scientists 334–353 publications: 250 scientists 354–373 publications: 214 scientists 374–393 publications: 187 scientists 394–413 publications: 152 scientists 414–433 publications: 169 scientists 434–453 publications: 147 scientists 454–473 publications: 111 scientists 474–493 publications: 117 scientists 494–513 publications: 103 scientists 514–533 publications: 99 scientists 534–553 publications: 92 scientists 554–573 publications: 75 scientists 574–593 publications: 58 scientists 594–613 publications: 69 scientists 614–633 publications: 50 scientists 634–653 publications: 62 scientists 654–673 publications: 54 scientists 674–693 publications: 44 scientists 694–713 publications: 37 scientists 714–733 publications: 28 scientists 734–753 publications: 26 scientists 754–773 publications: 26 scientists 774–793 publications: 19 scientists 794–813 publications: 23 scientists 814–833 publications: 20 scientists 834–853 publications: 16 scientists 854–873 publications: 20 scientists 874–893 publications: 11 scientists 894–913 publications: 11 scientists 914–933 publications: 16 scientists 934–953 publications: 13 scientists 954–973 publications: 10 scientists 974–993 publications: 11 scientists 994–1,013 publications: 9 scientists 1,014–1,033 publications: 9 scientists 1,034–1,053 publications: 10 scientists 1,054–1,064 publications: 6 scientists 1,065+ publications: 99 scientists
34 publications 1,065+

The last bar groups every scientist with 1,065 publications or more.

Paul S. Andry D-index placement in Electronics and Electrical Engineering in 2026

The chart shows the D-index (discipline H-index) distribution of Electronics and Electrical Engineering scientists ranked by Research.com in 2026. The highlighted bar marks where Paul S. Andry sits on this spectrum.

30 D-Index: 178 scientists 31 D-Index: 257 scientists 32 D-Index: 263 scientists 33 D-Index: 262 scientists 34 D-Index: 244 scientists 35 D-Index: 236 scientists 36 D-Index: 211 scientists 37 D-Index: 220 scientists 38 D-Index: 214 scientists 39 D-Index: 214 scientists 40 D-Index: 205 scientists 41 D-Index: 187 scientists 42 D-Index: 194 scientists 43 D-Index: 201 scientists 44 D-Index: 155 scientists 45 D-Index: 189 scientists 46 D-Index: 148 scientists 47 D-Index: 160 scientists 48 D-Index: 134 scientists 49 D-Index: 130 scientists 50 D-Index: 141 scientists 51 D-Index: 156 scientists 52 D-Index: 108 scientists 53 D-Index: 130 scientists 54 D-Index: 112 scientists 55 D-Index: 97 scientists 56 D-Index: 111 scientists 57 D-Index: 102 scientists 58 D-Index: 108 scientists 59 D-Index: 120 scientists 60 D-Index: 103 scientists 61 D-Index: 93 scientists 62 D-Index: 92 scientists 63 D-Index: 74 scientists 64 D-Index: 77 scientists 65 D-Index: 73 scientists 66 D-Index: 64 scientists 67 D-Index: 69 scientists 68 D-Index: 60 scientists 69 D-Index: 39 scientists 70 D-Index: 57 scientists 71 D-Index: 59 scientists 72 D-Index: 46 scientists 73 D-Index: 49 scientists 74 D-Index: 38 scientists 75 D-Index: 35 scientists 76 D-Index: 32 scientists 77 D-Index: 35 scientists 78 D-Index: 31 scientists 79 D-Index: 22 scientists 80 D-Index: 34 scientists 81 D-Index: 31 scientists 82 D-Index: 34 scientists 83 D-Index: 23 scientists 84 D-Index: 18 scientists 85 D-Index: 30 scientists 86 D-Index: 19 scientists 87 D-Index: 19 scientists 88 D-Index: 20 scientists 89 D-Index: 8 scientists 90 D-Index: 17 scientists 91 D-Index: 7 scientists 92 D-Index: 14 scientists 93 D-Index: 9 scientists 94 D-Index: 15 scientists 95 D-Index: 10 scientists 96 D-Index: 12 scientists 97 D-Index: 10 scientists 98 D-Index: 10 scientists 99 D-Index: 12 scientists 100 D-Index: 16 scientists 101 D-Index: 5 scientists 102 D-Index: 7 scientists 103 D-Index: 7 scientists 104 D-Index: 8 scientists 105 D-Index: 9 scientists 106 D-Index: 13 scientists 107 D-Index: 4 scientists 108 D-Index: 5 scientists 109 D-Index: 10 scientists 110 D-Index: 8 scientists 111+ D-Index: 96 scientists
30 D-Index 111+

The last bar groups every scientist with 111 D-Index or more.

Overview

Paul S. Andry is affiliated with IBM in the United States, where they conduct research primarily within the field of Engineering. Their work encompasses subfields such as Electrical and Electronic Engineering and Automotive Engineering.

Their research topics focus mainly on advanced semiconductor and manufacturing technologies. Key areas include:

  • 3D IC and TSV technologies
  • Electronic Packaging and Soldering Technologies
  • Additive Manufacturing and 3D Printing Technologies

Paul S. Andry has contributed to the academic literature with publications in highly specialized venues. They have published in the IEEE Transactions on Components Packaging and Manufacturing Technology, where they authored the paper titled "3-D Die Stacking With 55 μm Pitch Interconnections on Advanced Ground-Rule Laminate for Artificial Intelligence System" in 2021.

Frequent collaborators include:

  • Katsuyuki Sakuma
  • Mukta Farooq
  • C. Cabral
  • Thomas Wassick
  • Dale McHerron

These coauthors reflect the interdisciplinary nature of Paul S. Andry's research activities, intersecting areas of electronics packaging, advanced manufacturing, and system integration.

Best Publications

  • Three-dimensional silicon integration

    J. U. Knickerbocker;P. S. Andry;B. Dang;R. R. Horton

  • Interconnects in the third dimension: design challenges for 3D ICs

    Kerry Bernstein;Paul Andry;Jerome Cann;Phil Emma

  • Development of next-generation system-on-package (SOP) technology based on silicon carriers with fine-pitch chip interconnection

    J. U. Knickerbocker;P. S. Andry;L. P. Buchwalter;A. Deutsch

  • 3D silicon integration

    J.U. Knickerbocker;P.S. Andry;B. Dang;R.R. Horton

  • Silicon chip carrier with conductive through-vias and method for fabricating same

    Daniel Charles Edelstein;Paul Stephen Andry;Leena Paivikki Buchwalter;Jon Alfred Casey

  • 3-D Silicon Integration and Silicon Packaging Technology Using Silicon Through-Vias

    J.U. Knickerbocker;C.S. Patel;P.S. Andry;C.K. Tsang

  • 3D chip-stacking technology with through-silicon vias and low-volume lead-free interconnections

    K. Sakuma;P. S. Andry;C. K. Tsang;S. L. Wright

  • Apparatus and methods for constructing semiconductor chip packages with silicon space transformer carriers

    Paul S. Andry;John M. Cotte;John U. Knickerbocker;Cornelia K. Tsang

  • Conductive through via structure and process for electronic device carriers

    Paul S. Andry;Chirag S. Patel;Edmund J. Sprogis;Cornelia K. Tsang

  • Fabrication and characterization of robust through-silicon vias for silicon-carrier applications

    P. S. Andry;C. K. Tsang;B. C. Webb;E. J. Sprogis

  • A CMOS-compatible process for fabricating electrical through-vias in silicon

    P.S. Andry;C. Tsang;E. Sprogis;C. Patel

  • Characterization of micro-bump C4 interconnects for Si-carrier SOP applications

    S.L. Wright;R. Polastre;H. Gan;L.P. Buchwalter

  • 3D copper TSV integration, testing and reliability

    M. G. Farooq;T. L. Graves-Abe;W. F. Landers;C. Kothandaraman

  • 2.5D and 3D technology challenges and test vehicle demonstrations

    J. U. Knickerbocker;P. S. Andry;E. Colgan;B. Dang

  • Small area, robust silicon via structure and process

    Paul S. Andry;John M. Cotte;John Ulrich Knickerbocker;Cornelia K. Tsang

  • Double-face heat removal of vertically integrated chip-stacks utilizing combined symmetric silicon carrier fluid cavity and micro-channel cold plate

    Paul S. Andry;Thomas J. Brunschwiler;Evan G. Colgan;John H. Magerlein

  • Apparatus and methods for cooling semiconductor integrated circuit chip packages

    Paul S. Andry;Evan G. Colgan;Lawrence S. Mok;Chirag S. Patel

  • Through silicon via for use in integrated circuit chips

    Paul Stephen Andry;Edmund Juris Sprogis;Cornelia Kang-I Tsang

  • 3D Chip Stacking Technology with Low-Volume Lead-Free Interconnections

    K. Sakuma;P.S. Andry;B. Dang;J. Maria

  • Structure, Design and Process Control for Cu Bonded Interconnects in 3D Integrated Circuits

    Kuan-Neng Chen;Sang Hwui Lee;P.S. Andry;C.K. Tsang

Frequent Co-Authors

Cornelia K. Tsang
Cornelia K. Tsang IBM Thomas J. Watson Research Center
John U. Knickerbocker
John U. Knickerbocker IBM (United States)
Edmund J. Sprogis
Edmund J. Sprogis IBM (United States)
Cyril Cabral
Cyril Cabral IBM (United States)
Xiaoxiong Gu
Xiaoxiong Gu IBM (United States)
Mahesh G. Samant
Mahesh G. Samant IBM (United States)
Yong Liu
Yong Liu New York University
Subramanian S. Iyer
Subramanian S. Iyer University of California, Los Angeles
Jeffrey P. Gambino
Jeffrey P. Gambino ON Semiconductor (United States)
Daniel J. Friedman
Daniel J. Friedman IBM (United States)

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