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Yervant Zorian

Yervant Zorian

D-Index & Metrics

Computer Science

D-Index
50
Citations
10641
World Ranking
5596
National Ranking
2555

Overview

Yervant Zorian is affiliated with LogicVision in the United States and specializes in multiple aspects of electrical engineering, particularly focusing on integrated circuits and semiconductor failure analysis.

Their research encompasses several fields and subfields including Electrical and Electronic Engineering, Hardware and Architecture, Control and Systems Engineering, Computer Networks and Communications, and Electronic, Optical and Magnetic Materials. Within these areas, Zorian's work covers a range of topics:

  • Integrated Circuits and Semiconductor Failure Analysis
  • VLSI and Analog Circuit Testing
  • Radiation Effects in Electronics
  • Fault Detection and Control Systems
  • Electrical Fault Detection and Protection
  • Interconnection Networks and Systems
  • Semiconductor materials and devices

Zorian has contributed to a number of journal papers primarily published in IEEE venues. Recent works include:

  • "In-Field Testing of Functionally-Possible Transition Faults With High Activation Frequencies," 2024, IEEE Transactions on Device and Materials Reliability
  • "Functionally Possible Path Delay Faults With High Functional Switching Activity," 2024, IEEE Transactions on Very Large Scale Integration (VLSI) Systems
  • "In-field test solution for enhancing safety in automotive applications," 2022, Microelectronics Reliability
  • "IEEE Transactions on Very Large Scale Integration (VLSI) Systems," 2020, IEEE Transactions on Very Large Scale Integration (VLSI) Systems
  • "Testing for Electromigration in Sub-5-nm FinFET Memories," 2024, IEEE Design and Test

Their frequent publication venues include:

  • IEEE Transactions on Very Large Scale Integration (VLSI) Systems
  • IEEE Transactions on Computational Social Systems
  • IEEE Design and Test
  • IEEE Transactions on Device and Materials Reliability
  • Microelectronics Reliability

Zorian has collaborated repeatedly with several authors, with co-author counts indicating significant professional partnerships. Frequent co-authors include:

  • David Lomet
  • Riccardo Mariani
  • Amara Amara
  • Manuel Delgado-Restituto
  • Yong Lian

Best Publications

  • Testing embedded-core-based system chips

    Y. Zorian;E.J. Marinissen;S. Dey

  • A distributed BIST control scheme for complex VLSI devices

    Y. Zorian

  • On-Line Testing for VLSI—A Compendium of Approaches

    M. Nicolaidis;Y. Zorian

  • Testing 3D chips containing through-silicon vias

    Erik Jan Marinissen;Yervant Zorian

  • Introducing core-based system design

    R.K. Gupta;Y. Zorian

  • Wrapper design for embedded core test

    E.J. Marinissen;S.K. Goel;M. Lousberg

  • 2001 technology roadmap for semiconductors

    A. Allan;D. Edenfeld;W.H. Joyner;A.B. Kahng

  • Test requirements for embedded core-based systems and IEEE P1500

    Y. Zorian

  • Towards a standard for embedded core test: an example

    E.J. Marinissen;Y. Zorian;R. Kapur;T. Taylor

  • Testing the interconnect of RAM-based FPGAs

    M. Renovell;J.M. Portal;J. Figueras;Y. Zorian

  • On IEEE P1500's Standard for Embedded Core Test

    Erik Jan Marinissen;Rohit Kapur;Maurice Lousberg;Teresa McLaurin

  • Test of RAM-based FPGA: methodology and application to the interconnect

    M. Renovell;J. Figueras;Y. Zorian

  • Challenges in Embedded Memory Design and Test

    Erik Jan Marinissen;Betty Prince;Doris Keitel-Schulz;Yervant Zorian

  • Overview of the IEEE P1500 standard

    F. DaSilva;Y. Zorian;L. Whetsel;K. Arabi

  • Principles of testing electronic systems

    Samiha Mourad;Yervant Zorian

  • 2003 technology roadmap for semiconductors

    D. Edenfeld;A.B. Kahng;M. Rodgers;Y. Zorian

  • On using IEEE P1500 SECT for test plug-n-play

    E.J. Marinissen;R. Kapur;Y. Zorian

  • Guest Editors' Introduction: Design for Yield and Reliability

    Y. Zorian;D. Gizopoulos;C. Vandenberg;P. Magarshack

  • Challenges in testing core-based system ICs

    E.J. Marinissen;Y. Zorian

  • Built-in self-test for digital integrated circuits

    Vishwani D. Agrawal;Chih-Jen Lin;Paul W. Rutkowski;Shianling Wu

  • TRANSACTIONS ON KNOWLEDGE AND DATA ENGINEERING

    Gerald L. Engel;Deborah M. Cooper;Carl K. Chang;Michael R. Williams

  • An effective BIST scheme for ROM's

    Y. Zorian;A. Ivanov

  • PSBIST: A partial-scan based built-in self-test scheme

    C.-J. Lin;Y. Zorian;S. Bhawmik

  • Instruction-based self-testing of processor cores

    N. Kranitis;D. Gizopoulos;A. Paschalis;Y. Zorian

  • Test of future system-on-chips

    Yervant Zorian;Sujit Dey;Michael J. Rodgers

  • TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS

    Gerald L. Engel;Deborah M. Cooper;Carl K. Chang;Michael R. Williams

Frequent Co-Authors

Dimitris Gizopoulos
Dimitris Gizopoulos National and Kapodistrian University of Athens
Michel Renovell
Michel Renovell Montpellier Laboratory of Informatics, Robotics and Microelectronics
Sujit Dey
Sujit Dey University of California, San Diego
Michael Nicolaidis
Michael Nicolaidis TIMA Laboratory
Abhijit Chatterjee
Abhijit Chatterjee Georgia Institute of Technology
Irith Pomeranz
Irith Pomeranz Purdue University West Lafayette
Andrew B. Kahng
Andrew B. Kahng University of California, San Diego
Chih-Jen Lin
Chih-Jen Lin National Taiwan University
Lee D. Whetsel
Lee D. Whetsel Texas Instruments (United States)

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