World's Best Scientists 2026 revealed!

D-Index & Metrics

Electronics and Electrical Engineering

D-Index
31
Citations
7121
World Ranking
6454
National Ranking
2115

Ken Mai publication distribution in Electronics and Electrical Engineering in 2026

The chart shows the distribution of publications by all Research.com ranked scientists in the field of Electronics and Electrical Engineering in 2026. The highlighted bar marks where Ken Mai sits on this spectrum.

34–53 publications: 24 scientists 54–73 publications: 52 scientists 74–93 publications: 114 scientists 94–113 publications: 203 scientists 114–133 publications: 269 scientists 134–153 publications: 355 scientists 154–173 publications: 403 scientists 174–193 publications: 445 scientists 194–213 publications: 430 scientists 214–233 publications: 431 scientists 234–253 publications: 399 scientists 254–273 publications: 366 scientists 274–293 publications: 335 scientists 294–313 publications: 300 scientists 314–333 publications: 276 scientists 334–353 publications: 250 scientists 354–373 publications: 214 scientists 374–393 publications: 187 scientists 394–413 publications: 152 scientists 414–433 publications: 169 scientists 434–453 publications: 147 scientists 454–473 publications: 111 scientists 474–493 publications: 117 scientists 494–513 publications: 103 scientists 514–533 publications: 99 scientists 534–553 publications: 92 scientists 554–573 publications: 75 scientists 574–593 publications: 58 scientists 594–613 publications: 69 scientists 614–633 publications: 50 scientists 634–653 publications: 62 scientists 654–673 publications: 54 scientists 674–693 publications: 44 scientists 694–713 publications: 37 scientists 714–733 publications: 28 scientists 734–753 publications: 26 scientists 754–773 publications: 26 scientists 774–793 publications: 19 scientists 794–813 publications: 23 scientists 814–833 publications: 20 scientists 834–853 publications: 16 scientists 854–873 publications: 20 scientists 874–893 publications: 11 scientists 894–913 publications: 11 scientists 914–933 publications: 16 scientists 934–953 publications: 13 scientists 954–973 publications: 10 scientists 974–993 publications: 11 scientists 994–1,013 publications: 9 scientists 1,014–1,033 publications: 9 scientists 1,034–1,053 publications: 10 scientists 1,054–1,064 publications: 6 scientists 1,065+ publications: 99 scientists
34 publications 1,065+

This scientist: 98 publications — 3rd percentile

3% of scientists in this discipline score the same or lower.

The last bar groups every scientist with 1,065 publications or more.

Ken Mai D-index placement in Electronics and Electrical Engineering in 2026

The chart shows the D-index (discipline H-index) distribution of Electronics and Electrical Engineering scientists ranked by Research.com in 2026. The highlighted bar marks where Ken Mai sits on this spectrum.

30 D-Index: 178 scientists 31 D-Index: 257 scientists 32 D-Index: 263 scientists 33 D-Index: 262 scientists 34 D-Index: 244 scientists 35 D-Index: 236 scientists 36 D-Index: 211 scientists 37 D-Index: 220 scientists 38 D-Index: 214 scientists 39 D-Index: 214 scientists 40 D-Index: 205 scientists 41 D-Index: 187 scientists 42 D-Index: 194 scientists 43 D-Index: 201 scientists 44 D-Index: 155 scientists 45 D-Index: 189 scientists 46 D-Index: 148 scientists 47 D-Index: 160 scientists 48 D-Index: 134 scientists 49 D-Index: 130 scientists 50 D-Index: 141 scientists 51 D-Index: 156 scientists 52 D-Index: 108 scientists 53 D-Index: 130 scientists 54 D-Index: 112 scientists 55 D-Index: 97 scientists 56 D-Index: 111 scientists 57 D-Index: 102 scientists 58 D-Index: 108 scientists 59 D-Index: 120 scientists 60 D-Index: 103 scientists 61 D-Index: 93 scientists 62 D-Index: 92 scientists 63 D-Index: 74 scientists 64 D-Index: 77 scientists 65 D-Index: 73 scientists 66 D-Index: 64 scientists 67 D-Index: 69 scientists 68 D-Index: 60 scientists 69 D-Index: 39 scientists 70 D-Index: 57 scientists 71 D-Index: 59 scientists 72 D-Index: 46 scientists 73 D-Index: 49 scientists 74 D-Index: 38 scientists 75 D-Index: 35 scientists 76 D-Index: 32 scientists 77 D-Index: 35 scientists 78 D-Index: 31 scientists 79 D-Index: 22 scientists 80 D-Index: 34 scientists 81 D-Index: 31 scientists 82 D-Index: 34 scientists 83 D-Index: 23 scientists 84 D-Index: 18 scientists 85 D-Index: 30 scientists 86 D-Index: 19 scientists 87 D-Index: 19 scientists 88 D-Index: 20 scientists 89 D-Index: 8 scientists 90 D-Index: 17 scientists 91 D-Index: 7 scientists 92 D-Index: 14 scientists 93 D-Index: 9 scientists 94 D-Index: 15 scientists 95 D-Index: 10 scientists 96 D-Index: 12 scientists 97 D-Index: 10 scientists 98 D-Index: 10 scientists 99 D-Index: 12 scientists 100 D-Index: 16 scientists 101 D-Index: 5 scientists 102 D-Index: 7 scientists 103 D-Index: 7 scientists 104 D-Index: 8 scientists 105 D-Index: 9 scientists 106 D-Index: 13 scientists 107 D-Index: 4 scientists 108 D-Index: 5 scientists 109 D-Index: 10 scientists 110 D-Index: 8 scientists 111+ D-Index: 96 scientists
30 D-Index 111+

This scientist: 31 D-Index — 6th percentile

6% of scientists in this discipline score the same or lower.

The last bar groups every scientist with 111 D-Index or more.

Overview

Ken Mai is affiliated with Carnegie Mellon University in the United States. The primary fields of study for their research include Engineering and Computer Science, with further specialization in subfields such as Computer Vision and Pattern Recognition, Electrical and Electronic Engineering, Aerospace Engineering, Hardware and Architecture, and Cellular and Molecular Neuroscience.

Their research spans multiple main topics, which include Integrated Circuits and Semiconductor Failure Analysis, Robotics and Sensor-Based Localization, Advanced Vision and Imaging, Advanced Image and Video Retrieval Techniques, Physical Unclonable Functions (PUFs) and Hardware Security, Neuroscience and Neural Engineering, and Force Microscopy Techniques and Applications.

Ken Mai has contributed to several recent papers covering a variety of subjects and venues:

  • Split-Chip Design to Prevent IP Reverse Engineering, 2020, IEEE Design and Test
  • Towards Specialized Hardware for Learning-based Visual Odometry on the Edge, 2022, 2022 IEEE/RSJ International Conference on Intelligent Robots and Systems (IROS)
  • In Situ Observation of Circuit Behavior Using Pump-Probe Laser Voltage Probe Technique, 2024, IEEE Transactions on Nuclear Science
  • Multi-heat keypoint incorporation in deep learning model to tropical cyclone centering and intensity classifying from geostationary satellite images, 2025, Scientific Reports
  • Microwave-tailored S-scheme MOF@MOF heterojunctions: Synergistic dual-charge transfer and polarization enhancement toward efficient antibiotic degradation, 2025, Chemical Engineering Journal

Ken Mai has collaborated with various frequent coauthors, including Siyuan Chen, Samuel Pagliarini, Joseph Sweeney, R. D. Blanton, and Larry Pileggi.

Publication venues where Ken Mai's work has appeared include:

  • 2022 IEEE/RSJ International Conference on Intelligent Robots and Systems (IROS)
  • IEEE Design and Test
  • IEEE Transactions on Nuclear Science
  • Scientific Reports
  • Chemical Engineering Journal

Best Publications

  • The future of wires

    R. Ho;K.W. Mai;M.A. Horowitz

  • Error patterns in MLC NAND flash memory: measurement, characterization, and analysis

    Yu Cai;Erich F. Haratsch;Onur Mutlu;Ken Mai

  • Multi-bit Error Tolerant Caches Using Two-Dimensional Error Coding

    Jangwoo Kim;Nikos Hardavellas;Ken Mai;Babak Falsafi

  • Single-Chip Heterogeneous Computing: Does the Future Include Custom Logic, FPGAs, and GPGPUs?

    Eric S. Chung;Peter A. Milder;James C. Hoe;Ken Mai

  • Data retention in MLC NAND flash memory: Characterization, optimization, and recovery

    Yu Cai;Yixin Luo;Erich F. Haratsch;Ken Mai

  • Threshold voltage distribution in MLC NAND flash memory: characterization, analysis, and modeling

    Yu Cai;Erich F. Haratsch;Onur Mutlu;Ken Mai

  • Flash correct-and-refresh: Retention-aware error management for increased flash memory lifetime

    Yu Cai;Gulay Yalcin;Onur Mutlu;Erich F. Haratsch

  • Digital Circuit Design Challenges and Opportunities in the Era of Nanoscale CMOS

    B.H. Calhoun;Yu Cao;Xin Li;Ken Mai

  • Program interference in MLC NAND flash memory: Characterization, modeling, and mitigation

    Yu Cai;Onur Mutlu;Erich F. Haratsch;Ken Mai

  • CoRAM: an in-fabric memory architecture for FPGA-based computing

    Eric S. Chung;James C. Hoe;Ken Mai

  • Low-power SRAM design using half-swing pulse-mode techniques

    K.W. Mai;T. Mori;B.S. Amrutur;R. Ho

  • Vulnerabilities in MLC NAND Flash Memory Programming: Experimental Analysis, Exploits, and Mitigation Techniques

    Yu Cai;Saugata Ghose;Yixin Luo;Yixin Luo;Ken Mai

  • Multi-bit Error Tolerant Caches Using Two-Dimensional Error Coding

    Unknown

  • Efficient on-chip global interconnects

    R. Ho;K. Mai;M. Horowitz

  • ProtoFlex: Towards Scalable, Full-System Multiprocessor Simulations Using FPGAs

    Eric S. Chung;Michael K. Papamichael;Eriko Nurvitadhi;James C. Hoe

  • An efficient reliable PUF-based cryptographic key generator in 65nm CMOS

    Mudit Bhargava;Ken Mai

  • Reliability enhancement of bi-stable PUFs in 65nm bulk CMOS

    Mudit Bhargava;Cagla Cakir;Ken Mai

  • Applications of on-chip samplers for test and measurement of integrated circuits

    Ron Ho;B. Amrutur;Ken Mai;B. Wilburn

  • Neighbor-cell assisted error correction for MLC NAND flash memories

    Yu Cai;Gulay Yalcin;Onur Mutlu;Erich F. Haratsch

  • A high reliability PUF using hot carrier injection based response reinforcement

    Mudit Bhargava;Ken Mai

  • An efficient reliable PUF-based cryptographic key generator in 65nm CMOS

    Unknown

  • Snafu: an ultra-low-power, energy-minimal CGRA-generation framework and architecture

    Graham Gobieski;Ahmet Oguz Atli;Kenneth Mai;Brandon Lucia

  • Attack resistant sense amplifier based PUFs (SA-PUF) with deterministic and controllable reliability of PUF responses

    Mudit Bhargava;Cagla Cakir;Ken Mai

  • Read Disturb Errors in MLC NAND Flash Memory

    Yu Cai;Yixin Luo;Saugata Ghose;Erich F. Haratsch

  • Digital Circuit Design Challenges and Opportunities in the Era of Nanoscale CMOS : Small transistors necessitate big changes, in the way digital circuits are modeled and optimized for manufacturability, and new strategies for logic, memory, clocking and power distribution

    Benton H. Calhoun;Yu Cao;Xin Li;Ken Mai

Frequent Co-Authors

Onur Mutlu
Onur Mutlu ETH Zurich
Mark Horowitz
Mark Horowitz Stanford University
Ron Ho
Ron Ho Lattice Semiconductor (United States)
James C. Hoe
James C. Hoe Carnegie Mellon University
Larry Pileggi
Larry Pileggi Carnegie Mellon University
Babak Falsafi
Babak Falsafi École Polytechnique Fédérale de Lausanne
Benton H. Calhoun
Benton H. Calhoun University of Virginia
Saugata Ghose
Saugata Ghose University of Illinois at Urbana-Champaign
Farinaz Koushanfar
Farinaz Koushanfar University of California, San Diego
Radu Marculescu
Radu Marculescu The University of Texas at Austin

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