World's Best Scientists 2026 revealed!

D-Index & Metrics

Computer Science

D-Index
48
Citations
9466
World Ranking
6169
National Ranking
2769

Electronics and Electrical Engineering

D-Index
45
Citations
8839
World Ranking
3526
National Ranking
1305

Research.com Recognitions

  • 2009 - ACM Senior Member
  • 2008 - Fellow of Alfred P. Sloan Foundation

Overview

Luca P. Carloni is affiliated with Columbia University in the United States and is active in the fields of Computer Science and Engineering. Their research predominantly spans Electrical and Electronic Engineering, Hardware and Architecture, and incorporates elements of Artificial Intelligence, Computer Networks and Communications, and Nuclear and High Energy Physics.

The scientist's work covers a range of topics including Parallel Computing and Optimization Techniques, Embedded Systems Design Techniques, Interconnection Networks and Systems, Neural Networks and Reservoir Computing, Ferroelectric and Negative Capacitance Devices, Advanced Memory and Neural Computing, as well as Security and Verification in Computing.

Frequent co-authors collaborating with Luca P. Carloni include:

  • Giuseppe Di Guglielmo
  • Davide Giri
  • Paolo Mantovani
  • Joseph D. Zuckerman
  • Gabriele Tombesi

Their publication record includes contributions to a variety of venues, such as:

  • arXiv (Cornell University)
  • IEEE Micro
  • ACM Transactions on Embedded Computing Systems
  • Digestive and Liver Disease
  • Proceedings of the IEEE

Recent notable papers authored or co-authored by Luca P. Carloni include:

  • "Silicon Photonics Codesign for Deep Learning" (2020), published in Proceedings of the IEEE
  • "Machine-Learning-Based Microwave Sensing: A Case Study for the Food Industry" (2021), published in IEEE Journal on Emerging and Selected Topics in Circuits and Systems
  • "Leveraging Prior Knowledge for Effective Design-Space Exploration in High-Level Synthesis" (2020), published in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
  • "Accelerator Integration for Open-Source SoC Design" (2021), published in IEEE Micro
  • "A 12nm Agile-Designed SoC for Swarm-Based Perception with Heterogeneous IP Blocks, a Reconfigurable Memory Hierarchy, and an 800MHz Multi-Plane NoC" (2022), published in ESSCIRC 2022 - IEEE 48th European Solid State Circuits Conference (ESSCIRC)

Luca P. Carloni has received recognition through awards including being named an ACM Senior Member in 2009 and a Fellow of the Alfred P. Sloan Foundation in 2008.

Best Publications

  • Photonic Networks-on-Chip for Future Generations of Chip Multiprocessors

    A. Shacham;K. Bergman;L.P. Carloni

  • Theory of latency-insensitive design

    L.P. Carloni;K.L. McMillan;A.L. Sangiovanni-Vincentelli

  • On the Design of a Photonic Network-on-Chip

    A. Shacham;K. Bergman;L.P. Carloni

  • Creation of structured data from plain text

    Alexander Saldanha;Patrick C. Mcgeer;Luca Carloni

  • A methodology for correct-by-construction latency insensitive design

    Luca P. Carloni;Kenneth L. McMillan;Alexander Saldanha;Alberto L. Sangiovanni-Vincentelli

  • Benefits and challenges for platform-based design

    A. Sangiovanni-Vincentelli;L. Carloni;F. De Bernardinis;M. Sgroi

  • Networks-on-chip in emerging interconnect paradigms: Advantages and challenges

    Luca P. Carloni;Partha Pande;Yuan Xie

  • Languages and Tools for Hybrid Systems Design

    Luca P. Carloni;Roberto Passerone;Alessandro Pinto;Alberto L. Angiovanni-Vincentelli

  • On learning-based methods for design-space exploration with high-level synthesis

    Hung-Yi Liu;Luca P. Carloni

  • A 2.5D Integrated Voltage Regulator Using Coupled-Magnetic-Core Inductors on Silicon Interposer

    N. Sturcken;E. J. O'Sullivan;N. Wang;P. Herget

  • Efficient synthesis of networks on chip

    A. Pinto;L.P. Carloni;A.L. Sangiovanni-Vincentelli

  • Coping with latency in SOC design

    L.P. Carloni;A.L. Sangiovanni-Vincentelli

  • Photonic NoC for DMA Communications in Chip Multiprocessors

    A. Shacham;B.G. Lee;A. Biberman;K. Bergman

  • PhoenixSim: a simulator for physical-layer analysis of chip-scale photonic interconnection networks

    Johnnie Chan;Gilbert Hendry;Aleksandr Biberman;Keren Bergman

  • Physical-Layer Modeling and System-Level Design of Chip-Scale Photonic Interconnection Networks

    J. Chan;G. Hendry;K. Bergman;L. P. Carloni

  • Photonic Network-on-Chip Design

    Keren Bergman;Luca P. Carloni;Aleksandr Biberman;Johnnie Chan

  • Performance analysis and optimization of latency insensitive systems

    Luca P. Carloni;Alberto L. Sangiovanni-Vincentelli

  • Design Exploration of Optical Interconnection Networks for Chip Multiprocessors

    M. Petracca;B.G. Lee;K. Bergman;L.P. Carloni

  • The case for low-power photonic networks on chip

    Assaf Shacham;Keren Bergman;Luca P. Carloni

  • Constraint-driven communication synthesis

    Alessandro Pinto;Luca P. Carloni;Alberto L. Sangiovanni-Vincentelli

  • COSMOS: Coordination of High-Level Synthesis and Memory Optimization for Hardware Accelerators

    Luca Piccolboni;Paolo Mantovani;Giuseppe Di Guglielmo;Luca P. Carloni

Frequent Co-Authors

Alberto Sangiovanni-Vincentelli
Alberto Sangiovanni-Vincentelli University of California, Berkeley
Keren Bergman
Keren Bergman Columbia University
Albert Benveniste
Albert Benveniste French Institute for Research in Computer Science and Automation - INRIA
Robert K. Brayton
Robert K. Brayton University of California, Berkeley
Roberto Passerone
Roberto Passerone University of Trento
Ioannis Kymissis
Ioannis Kymissis Columbia University
Kenneth L. Shepard
Kenneth L. Shepard Columbia University
Benjamin G. Lee
Benjamin G. Lee Nvidia (United States)
Peter R. Kinget
Peter R. Kinget Columbia University
Edoardo Charbon
Edoardo Charbon École Polytechnique Fédérale de Lausanne

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