D-Index & Metrics Best Publications

D-Index & Metrics

Discipline name D-index D-index (Discipline H-index) only includes papers and citation values for an examined discipline in contrast to General H-index which accounts for publications across all disciplines. Citations Publications World Ranking National Ranking
Computer Science D-index 41 Citations 9,900 130 World Ranking 4305 National Ranking 2162

Overview

What is he best known for?

The fields of study he is best known for:

  • Operating system
  • Central processing unit
  • Programming language

John Wawrzynek mainly investigates Parallel computing, Field-programmable gate array, Computer architecture, Reconfigurable computing and Compiler. The various areas that John Wawrzynek examines in his Parallel computing study include Virtual Processor, Process, Very-large-scale integration and Dram. His Field-programmable gate array study integrates concerns from other disciplines, such as Time complexity, Functional programming and Leverage.

His Computer architecture study combines topics in areas such as Coprocessor, Fraction, Range, Software and Computation. His Reconfigurable computing study combines topics from a wide range of disciplines, such as Logic synthesis, Software deployment, Interconnection and Component. His Compiler research includes elements of Dynamic programming, Abstract machine and Finite state machine with datapath, Datapath.

His most cited work include:

  • Garp: a MIPS processor with a reconfigurable coprocessor (863 citations)
  • A view of the parallel computing landscape (485 citations)
  • The Garp architecture and C compiler (418 citations)

What are the main themes of his work throughout his whole career to date?

John Wawrzynek spends much of his time researching Field-programmable gate array, Embedded system, Parallel computing, Computer architecture and Computer hardware. His work in the fields of Field-programmable gate array, such as Reconfigurable computing, intersects with other areas such as Emulation and Throughput. His research in Embedded system intersects with topics in Instruction set and Signal processing.

He combines subjects such as Compiler and Static random-access memory with his study of Parallel computing. His Computer architecture research is multidisciplinary, incorporating perspectives in Multithreading and Computation. His Computer hardware research also works with subjects such as

  • Artificial neural network that connect with fields like Supercomputer,
  • Interface, which have a strong connection to Integrated circuit.

He most often published in these fields:

  • Field-programmable gate array (35.50%)
  • Embedded system (26.04%)
  • Parallel computing (22.49%)

What were the highlights of his more recent work (between 2012-2021)?

  • Field-programmable gate array (35.50%)
  • Embedded system (26.04%)
  • Parallel computing (22.49%)

In recent papers he was focusing on the following fields of study:

The scientist’s investigation covers issues in Field-programmable gate array, Embedded system, Parallel computing, Speedup and Context. John Wawrzynek interconnects Computer architecture, Key and Software in the investigation of issues within Field-programmable gate array. His Computer architecture research includes themes of Overlay and Latency.

His specific area of interest is Embedded system, where he studies Reconfigurable computing. His Reconfigurable computing research is multidisciplinary, relying on both Block, MicroBlaze and Benchmark. His work in the fields of Parallel computing, such as Memory architecture, overlaps with other areas such as Resistive random-access memory.

Between 2012 and 2021, his most popular works were:

  • The cloud is not enough: saving iot from the cloud (135 citations)
  • The Swarm at the Edge of the Cloud (86 citations)
  • Localization as a feature of mmWave communication (68 citations)

In his most recent research, the most cited papers focused on:

  • Operating system
  • Central processing unit
  • Programming language

John Wawrzynek spends much of his time researching Field-programmable gate array, Cloud computing, Computer hardware, Co-design and Task. The Field-programmable gate array study combines topics in areas such as Data access, Software, Memory bandwidth and Computer architecture. The study incorporates disciplines such as Computer security, Enhanced Data Rates for GSM Evolution and Forwarding plane in addition to Cloud computing.

His studies in Computer hardware integrate themes in fields like Exploit, Artificial neural network, Embedded hardware and Key. As part of the same scientific family, John Wawrzynek usually focuses on Distributed computing, concentrating on Component and intersecting with Embedded system. His Hardware acceleration study, which is part of a larger body of work in Embedded system, is frequently linked to Throughput, bridging the gap between disciplines.

This overview was generated by a machine learning system which analysed the scientist’s body of work. If you have any feedback, you can contact us here.

Best Publications

Garp: a MIPS processor with a reconfigurable coprocessor

J.R. Hauser;J. Wawrzynek.
field programmable custom computing machines (1997)

1387 Citations

A view of the parallel computing landscape

Krste Asanovic;Rastislav Bodik;James Demmel;Tony Keaveny.
parallel computing (2009)

783 Citations

The Garp architecture and C compiler

T.J. Callahan;J.R. Hauser;J. Wawrzynek.
IEEE Computer (2000)

645 Citations

Chisel: constructing hardware in a Scala embedded language

Jonathan Bachrach;Huy Vo;Brian Richards;Yunsup Lee.
design automation conference (2012)

611 Citations

Fine-grain parallelism with minimal hardware support: a compiler-controlled threaded abstract machine

David E. Culler;Anurag Sah;Klaus E. Schauser;Thorsten von Eicken.
architectural support for programming languages and operating systems (1991)

438 Citations

Reconfigurable computing: what, why, and implications for design automation

André DeHon;John Wawrzynek.
design automation conference (1999)

406 Citations

BEE2: a high-end reconfigurable computing system

C. Chang;J. Wawrzynek;R.W. Brodersen.
IEEE Design & Test of Computers (2005)

400 Citations

Stream Computations Organized for Reconfigurable Execution (SCORE)

Eylon Caspi;Michael Chu;Randy Huang;Joseph Yeh.
field programmable logic and applications (2000)

379 Citations

HSRA: high-speed, hierarchical synchronous reconfigurable array

William Tsu;Kip Macy;Atul Joshi;Randy Huang.
field programmable gate arrays (1999)

340 Citations

Silicon auditory processors as computer peripherals

J. Lazzaro;J. Wawrzynek;M. Mahowald;M. Sivilotti.
IEEE Transactions on Neural Networks (1993)

311 Citations

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