World's Best Scientists 2026 revealed!

D-Index & Metrics

Computer Science

D-Index
35
Citations
5667
World Ranking
11644
National Ranking
4775

Overview

Thomas M. Conte is affiliated with the Georgia Institute of Technology in the United States. Their research spans multiple fields and subfields within computing and engineering, focusing particularly on areas related to hardware architecture and parallel computing.

Their recent publications cover several topics and were published in notable venues. Key papers include:

  • A vision to compute like nature, 2021, Communications of the ACM
  • IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2021, IEEE Transactions on Very Large Scale Integration (VLSI) Systems
  • "Smarter" NICs for faster molecular dynamics: a case study, 2022, 2022 IEEE International Parallel and Distributed Processing Symposium (IPDPS)
  • Programming Strategies for Irregular Algorithms on the Emu Chick, 2020, ACM Transactions on Parallel Computing
  • Scalable Energy-Efficient Microarchitectures With Computational Error Tolerance Via Redundant Residue Number Systems, 2021, IEEE Transactions on Computers

Frequent co-authors who have collaborated with Thomas M. Conte include:

  • Christina Schober
  • Forrest Shull
  • William Gropp
  • Riccardo Mariani
  • Melissa Russell

The scientist's work appears regularly in prominent publication venues such as:

  • IEEE Transactions on Very Large Scale Integration (VLSI) Systems
  • IEEE Spectrum
  • arXiv (Cornell University)
  • IEEE Transactions on Multimedia
  • Communications of the ACM

Thomas M. Conte's research fields and subfields of study include:

  • Electrical and Electronic Engineering
  • Hardware and Architecture
  • Artificial Intelligence
  • Computer Networks and Communications
  • Atomic and Molecular Physics, and Optics

Their research focuses on several main topics, such as:

  • Parallel Computing and Optimization Techniques
  • Quantum Computing Algorithms and Architecture
  • Advanced Memory and Neural Computing
  • Advanced Data Storage Technologies
  • Semiconductor materials and devices
  • Quantum Information and Cryptography
  • Quantum Mechanics and Applications

Best Publications

  • Adaptive mode control: A static-power-efficient cache design

    Huiyang Zhou;Mark C. Toburen;Eric Rotenberg;Thomas M. Conte

  • Optimization of instruction fetch mechanisms for high issue rates

    Thomas M. Conte;Kishore N. Menezes;Patrick M. Mills;Burzin A. Patel

  • Reducing state loss for effective trace sampling of superscalar processors

    T.M. Conte;M.A. Hirsch;K.N. Menezes

  • Unified assign and schedule: a new approach to scheduling for clustered register file microarchitectures

    Emre Özer;Sanjeev Banerjia;Thomas M. Conte

  • A Benchmark Characterization of the EEMBC Benchmark Suite

    J.A. Poovey;T.M. Conte;M. Levy;S. Gal-On

  • PARALLEL AND DISTRIBUTED SYSTEMS

    James D. Isaak;Sorel Reisman;Jeffrey M. Voas;Elizabeth L. Burd

  • Enhancing memory-level parallelism via recovery-free value prediction

    H. Zhou;T.M. Conte

  • Configurable string matching hardware for speeding up intrusion detection

    Monther Aldwairi;Thomas Conte;Paul Franzon

  • Challenges to combining general-purpose and multimedia processors

    T.M. Conte;P.K. Dubey;M.D. Jennings;R.B. Lee

  • Performance analysis and its impact on design

    P. Bose;T.M. Conte

  • Instruction fetch mechanisms for VLIW architectures with compressed encodings

    Thomas M. Conte;Sanjeev Banerjia;Sergei Y. Larin;Kishore N. Menezes

  • Touch screen with tactile feedback

    Thomas M. Conte;Bill Mangione-Smith

  • Comparing Software And Hardware Schemes For Reducing The Cost Of Branches

    Wen-mei W. Hwu;T.M. Conte;Pohua P. Chang

  • Using branch handling hardware to support profile-driven optimization

    T.M. Conte;B.A. Patel;J.S. Cox

  • Dynamic rescheduling: a technique for object code compatibility in VLIW architectures

    Thomas M. Conte;Sumedh W. Sathaye

  • Accurate and practical profile-driven compilation using the profile buffer

    Thomas M. Conte;Kishore N. Menezes;Mary Ann Hirsch

  • Compiler-driven cached code compression schemes for embedded ILP processors

    Sergei Y. Larin;Thomas M. Conte

  • Benchmark characterization

    T.M. Conte;W.W. Hwu

  • Treegion scheduling for wide issue processors

    W.A. Havanki;S. Banerjia;T.M. Conte

  • The effect of code expanding optimizations on instruction cache design

    W.Y. Chen;P.P. Chang;T.M. Conte;W.W. Hwu

Frequent Co-Authors

Wen-mei W. Hwu
Wen-mei W. Hwu University of Illinois at Urbana-Champaign
Paul D. Franzon
Paul D. Franzon North Carolina State University
Elisa Bertino
Elisa Bertino Purdue University West Lafayette
Pradip Bose
Pradip Bose IBM (United States)
R. Stanley Williams
R. Stanley Williams Texas A&M University
Todd Austin
Todd Austin University of Michigan–Ann Arbor
Peter M. Kogge
Peter M. Kogge University of Notre Dame
Dejan Milojicic
Dejan Milojicic Hewlett-Packard (United States)
Richard Vuduc
Richard Vuduc Georgia Institute of Technology
John A. Miller
John A. Miller University of Georgia

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