2020 - Fellow of the American Association for the Advancement of Science (AAAS)
2009 - ACM Senior Member
Peter M. Kogge mainly focuses on Parallel computing, SIMD, MIMD, Computer hardware and Distributed memory. His study in Parallel computing is interdisciplinary in nature, drawing from both Microprocessor, Bridging and Very-large-scale integration. His work in SIMD tackles topics such as Parallel processing which are related to areas like Set, Network interface, Block, Logic synthesis and Computer architecture.
His biological study spans a wide range of topics, including Systolic array, MISD, Program counter and Instruction register. Peter M. Kogge studied Computer hardware and Parallel array that intersect with Multiprocessing, Array processing and Sparse array. His Distributed memory research incorporates elements of Vector processor, Supercomputer, Chip and Massively parallel.
Peter M. Kogge focuses on Parallel computing, Computer architecture, SIMD, Computer hardware and MIMD. His work carried out in the field of Parallel computing brings together such families of science as Multithreading, Thread and Uniform memory access. His Computer architecture research includes elements of Parallel processing, Chip, Memory rank, Multi-core processor and Massively parallel.
His work is dedicated to discovering how Chip, Dram are connected with Logic gate and other disciplines. The SIMD study combines topics in areas such as Parallel array and Array processing. His MIMD study frequently draws parallels with other fields, such as Vector processor.
His primary areas of investigation include Parallel computing, Computer architecture, Scalability, Multithreading and Distributed computing. His studies deal with areas such as Partitioned global address space and Programming paradigm as well as Parallel computing. The study incorporates disciplines such as TOP500, Microarchitecture and Massively parallel in addition to Computer architecture.
Peter M. Kogge combines subjects such as Algorithm and Instruction set with his study of Multithreading. His Distributed computing research focuses on subjects like Big data, which are linked to Speedup, Parameterized complexity, Resource, Variety and Leverage. His research investigates the link between Thread and topics such as Multi-core processor that cross with problems in Energy consumption and Efficient energy use.
The scientist’s investigation covers issues in Supercomputer, Parallel computing, Computer architecture, Electronic engineering and Concurrency. His research integrates issues of Moore's law, Data science and FLOPS in his study of Supercomputer. His Parallel computing study focuses on Multi-core processor in particular.
His work deals with themes such as Uniform memory access and Cache-only memory architecture, which intersect with Computer architecture. His study in the fields of Logic gate under the domain of Electronic engineering overlaps with other disciplines such as Throughput. His Concurrency course of study focuses on Engineering management and Big data, Energy consumption and Exascale computing.
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A Parallel Algorithm for the Efficient Solution of a General Class of Recurrence Equations
Peter M. Kogge;Harold S. Stone.
IEEE Transactions on Computers (1973)
The Architecture of Pipelined Computers
Peter M. Kogge.
(1981)
Dynamic multi-mode parallel processing array
Kogge Peter Michael.
(1994)
Advanced parallel array processor (APAP)
Thomas Norman Barker;Clive Allan Collins;Michael Charles Dapp;James Warren Dieffenderfer.
(1995)
Hybrid architecture for video on demand server
Vincent J. Smoral;Peter M. Kogge;Phillip J. Sementilli.
(1995)
Mapping Irregular Applications to DIVA, a PIM-based Data-Intensive Architecture
Mary Hall;Peter Kogge;Jeff Koller;Pedro Diniz.
conference on high performance computing (supercomputing) (1999)
EXECUBE-A New Architecture for Scaleable MPPs
Peter Kogge.
international conference on parallel processing (1994)
Inherently lower-power high-performance superscalar architectures
V.V. Zyuban;P.M. Kogge.
IEEE Transactions on Computers (2001)
Problems in designing with QCAs: Layout = Timing
Michael T. Niemier;Peter M. Kogge.
International Journal of Circuit Theory and Applications (2001)
The energy complexity of register files
V. Zyuban;P. Kogge.
international symposium on low power electronics and design (1998)
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