D-Index & Metrics Best Publications

D-Index & Metrics D-index (Discipline H-index) only includes papers and citation values for an examined discipline in contrast to General H-index which accounts for publications across all disciplines.

Discipline name D-index D-index (Discipline H-index) only includes papers and citation values for an examined discipline in contrast to General H-index which accounts for publications across all disciplines. Citations Publications World Ranking National Ranking
Electronics and Electrical Engineering D-index 41 Citations 6,636 252 World Ranking 2682 National Ranking 1067

Overview

What is he best known for?

The fields of study he is best known for:

  • Algorithm
  • Operating system
  • Electrical engineering

Earl E. Swartzlander mainly focuses on Adder, Multiplier, CMOS, Arithmetic and Computer hardware. His research investigates the connection between Adder and topics such as Floating point that intersect with issues in Throughput, Fast Fourier transform, Parallel computing and Multiply–accumulate operation. Among his research on Multiplier, you can see a combination of other fields of science like Logic gate and Algorithm.

His research integrates issues of Wallace multiplier and Partial product in his study of Algorithm. His work carried out in the field of Arithmetic brings together such families of science as Matrix and Interconnection. His work on Digital signal processing as part of his general Computer hardware study is frequently connected to Gas compressor, thereby bridging the divide between different branches of science.

His most cited work include:

  • Adder and Multiplier Design in Quantum-Dot Cellular Automata (269 citations)
  • Adder Designs and Analyses for Quantum-Dot Cellular Automata (248 citations)
  • Truncated multiplication with correction constant [for DSP] (146 citations)

What are the main themes of his work throughout his whole career to date?

Earl E. Swartzlander mainly investigates Adder, Arithmetic, Parallel computing, Algorithm and Multiplier. His work deals with themes such as Floating point, Quantum dot cellular automaton, Logic gate and Computer hardware, which intersect with Adder. The concepts of his Logic gate study are interwoven with issues in Memristor, Computer engineering and Cellular automaton.

He has researched Arithmetic in several fields, including Reduction and Signal processing. The Parallel computing study combines topics in areas such as Fast Fourier transform, CORDIC, Throughput and Error detection and correction. His study in Algorithm is interdisciplinary in nature, drawing from both Function, Division, Systolic array and Discrete cosine transform.

He most often published in these fields:

  • Adder (36.32%)
  • Arithmetic (30.66%)
  • Parallel computing (24.06%)

What were the highlights of his more recent work (between 2010-2020)?

  • Adder (36.32%)
  • Arithmetic (30.66%)
  • Logic gate (15.09%)

In recent papers he was focusing on the following fields of study:

His scientific interests lie mostly in Adder, Arithmetic, Logic gate, Algorithm and Multiplier. His biological study spans a wide range of topics, including Floating point, Memristor and Parallel computing. His work in the fields of Arithmetic, such as Multiplication, Carry and Binary scaling, overlaps with other areas such as Residue.

His Logic gate study combines topics from a wide range of disciplines, such as Pass transistor logic and Computer engineering. His Algorithm study incorporates themes from Division, Division algorithm, Mathematical optimization and Binary number. His Multiplier investigation overlaps with CMOS and Operand.

Between 2010 and 2020, his most popular works were:

  • A First Step Toward Cost Functions for Quantum-Dot Cellular Automata Designs (98 citations)
  • FFT Implementation with Fused Floating-Point Operations (88 citations)
  • Are QCA cryptographic circuits resistant to power analysis attack (65 citations)

In his most recent research, the most cited papers focused on:

  • Algorithm
  • Operating system
  • Electrical engineering

Earl E. Swartzlander mostly deals with Adder, CMOS, Electronic engineering, Logic gate and Multiplier. His studies in Adder integrate themes in fields like Floating point, Fast Fourier transform, Throughput and Parallel computing. He is studying Quantum dot cellular automaton, which is a component of CMOS.

His work on Logic synthesis and Memristor as part of general Electronic engineering study is frequently linked to Countermeasure, therefore connecting diverse disciplines of science. He conducts interdisciplinary study in the fields of Multiplier and Algorithm through his works. Earl E. Swartzlander interconnects Binary number and Arithmetic in the investigation of issues within Algorithm.

This overview was generated by a machine learning system which analysed the scientist’s body of work. If you have any feedback, you can contact us here.

Best Publications

Adder and Multiplier Design in Quantum-Dot Cellular Automata

H. Cho;E.E. Swartzlander.
IEEE Transactions on Computers (2009)

429 Citations

Adder Designs and Analyses for Quantum-Dot Cellular Automata

H. Cho;E.E. Swartzlander.
IEEE Transactions on Nanotechnology (2007)

390 Citations

The Sign/Logarithm Number System

E.E. Swartzlander;A.G. Alexopoulos.
IEEE Transactions on Computers (1975)

363 Citations

Truncated multiplication with correction constant [for DSP]

M.J. Schulte;E.E. Swartzlander.
ieee workshop on vlsi signal processing (1993)

312 Citations

A spanning tree carry lookahead adder

T. Lynch;E.E. Swartzlander.
IEEE Transactions on Computers (1992)

224 Citations

A First Step Toward Cost Functions for Quantum-Dot Cellular Automata Designs

Weiqiang Liu;Liang Lu;Maire ONeill;Earl E. Swartzlander.
IEEE Transactions on Nanotechnology (2014)

173 Citations

Hardware designs for exactly rounded elementary functions

M.J. Schulte;E.E. Swartzlander.
IEEE Transactions on Computers (1994)

162 Citations

FFT Implementation with Fused Floating-Point Operations

Earl E. Swartzlander;H. H. M. Saleh.
IEEE Transactions on Computers (2012)

158 Citations

A Reduced Complexity Wallace Multiplier Reduction

Ron S Waters;Earl E Swartzlander.
IEEE Transactions on Computers (2010)

149 Citations

A comparison of Dadda and Wallace multiplier delays

Whitney J. Townsend;Earl E. Swartzlander;Jacob A. Abraham.
conference on advanced signal processing algorithms architectures and implemenations (2003)

138 Citations

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