2026 Rakesh Kumar: Computer Science Researcher – H-Index, Publications & Awards

Discipline name	D-Index	World Ranking	Current World Ranking	National Ranking	Current National Ranking	Publications	Citations
Computer Science	39	9645	9369	4086	3917	150	7754

Overview

Rakesh Kumar is affiliated with the University of Illinois at Urbana-Champaign in the United States. Their research primarily focuses on several aspects of computer science, particularly within hardware and architecture, computer networks and communications, and information systems. They have also contributed to the fields of electrical and electronic engineering and artificial intelligence.

Their main fields of study involve the broader area of computer science with a specific emphasis on subfields such as:

Hardware and Architecture
Computer Networks and Communications
Information Systems
Electrical and Electronic Engineering
Artificial Intelligence

Within these areas, the key topics that frequently appear in their work include:

Parallel Computing and Optimization Techniques
Embedded Systems Design Techniques
Interconnection Networks and Systems
Cloud Computing and Resource Management
IoT and Edge/Fog Computing
AI in cancer detection
Artificial Intelligence in Healthcare

Rakesh Kumar's recent publications cover a range of topics related to embedded platforms, thermal management, network-on-chip architectures, and machine learning applications. Some noteworthy papers include:

"Design Space Exploration for Chiplet-Assembly-Based Processors" (2020) published in IEEE Transactions on Very Large Scale Integration (VLSI) Systems
"A Novel Multi-Neural Ensemble Approach for Cancer Diagnosis" (2021) published in Applied Artificial Intelligence
"Application driven routing for mesh based Network-on-Chip architectures" (2022) published in Integration
"Application Phase Behavior-Guided Thermal Management of Embedded Platforms" (2020) published in IEEE Embedded Systems Letters
"Machine learning guided thermal management of Open Computing Language applications on CPU-GPU based embedded platforms" (2022) published in IET Computers & Digital Techniques

The scholar has collaborated with various co-authors throughout their career. Frequent collaborators include:

Bibhas Ghoshal
Akash Sachan
Ankur Gogoi
Saptadeep Pal
Daniel Petrisko

Publication venues where Rakesh Kumar has contributed multiple works reflect the interdisciplinary nature of their research. These venues include:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Applied Artificial Intelligence
Integration
IEEE Embedded Systems Letters
IET Computers & Digital Techniques

Best Publications

Single-ISA heterogeneous multi-core architectures: the potential for processor power reduction

Rakesh Kumar;Keith I. Farkas;Norman P. Jouppi;Parthasarathy Ranganathan

1076
Citations
Single-ISA Heterogeneous Multi-Core Architectures for Multithreaded Workload Performance

Rakesh Kumar;Dean M. Tullsen;Parthasarathy Ranganathan;Norman P. Jouppi

860
Citations
Interconnections in Multi-Core Architectures: Understanding Mechanisms, Overheads and Scaling

Rakesh Kumar;Victor Zyuban;Dean M. Tullsen

639
Citations
Heterogeneous chip multiprocessors

R. Kumar;D.M. Tullsen;N.P. Jouppi;P. Ranganathan

502
Citations
Core architecture optimization for heterogeneous chip multiprocessors

Rakesh Kumar;Dean M. Tullsen;Norman P. Jouppi

317
Citations
On reconfiguration-oriented approximate adder design and its application

Rong Ye;Ting Wang;Feng Yuan;Rakesh Kumar

271
Citations
Slack redistribution for graceful degradation under voltage overscaling

Andrew B. Kahng;Seokhyeong Kang;Rakesh Kumar;John Sartori

208
Citations
Stochastic computation

Naresh R. Shanbhag;Rami A. Abdallah;Rakesh Kumar;Douglas L. Jones

201
Citations
Scalable stochastic processors

Sriram Narayanan;John Sartori;Rakesh Kumar;Douglas L. Jones

199
Citations
Underdesigned and Opportunistic Computing in Presence of Hardware Variability

P. Gupta;Y. Agarwal;L. Dolecek;N. Dutt

186
Citations
Designing a processor from the ground up to allow voltage/reliability tradeoffs

Andrew B. Kahng;Seokhyeong Kang;Rakesh Kumar;John Sartori

137
Citations
Algorithmic approaches to low overhead fault detection for sparse linear algebra

Joseph Sloan;Rakesh Kumar;Greg Bronevetsky

132
Citations
Conjoined-Core Chip Multiprocessing

Rakesh Kumar;Norman P. Jouppi;Dean M. Tullsen

131
Citations
Branch and Data Herding: Reducing Control and Memory Divergence for Error-Tolerant GPU Applications

J. Sartori;R. Kumar

122
Citations
Exploiting unbalanced thread scheduling for energy and performance on a CMP of SMT processors

Matthew DeVuyst;Rakesh Kumar;Dean M. Tullsen

110
Citations
Processor Power Reduction Via Single-ISA Heterogeneous Multi-Core Architectures

R. Kumar;K. Farkas;N.P. Jouppi;P. Ranganathan

104
Citations
Hardware Acceleration of Graph Neural Networks

Adam Auten;Matthew Tomei;Rakesh Kumar

94
Citations
On the efficacy of NBTI mitigation techniques

Tuck-Boon Chan;John Sartori;Puneet Gupta;Rakesh Kumar

92
Citations
Proximity-aware directory-based coherence for multi-core processor architectures

Jeffery A. Brown;Rakesh Kumar;Dean Tullsen

87
Citations
End-to-End Network Delay Guarantees for Real-Time Systems Using SDN

Rakesh Kumar;Monowar Hasan;Smruti Padhy;Konstantin Evchenko

82
Citations

Frequent Co-Authors

Supun Samarasekera SRI International

Dean M. Tullsen University of California, San Diego

Harpreet Sawhney Microsoft (United States)

Norman P. Jouppi Google (United States)

David M. Nicol University of Illinois at Urbana-Champaign

Puneet Gupta University of California, Los Angeles

Andrew B. Kahng University of California, San Diego

Keith I. Farkas VMware

Parthasarathy Ranganathan Google (United States)

Lara Dolecek University of California, Los Angeles

External Links

Personal website of Rakesh Kumar

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