World's Best Scientists 2026 revealed!

D-Index & Metrics

Electronics and Electrical Engineering

D-Index
40
Citations
6447
World Ranking
4508
National Ranking
1594

Overview

Michael Wirthlin is affiliated with Brigham Young University in the United States, with a research focus primarily in the fields of Engineering and Computer Science. Their work spans several subfields, including Electrical and Electronic Engineering, Hardware and Architecture, Safety, Risk, Reliability and Quality, Artificial Intelligence, and Computer Vision and Pattern Recognition.

The central themes in Michael Wirthlin's research revolve around Radiation Effects in Electronics, VLSI and Analog Circuit Testing, and Integrated Circuits and Semiconductor Failure Analysis. Additional topics include Reliability and Maintenance Optimization, Low-power high-performance VLSI design, Adversarial Robustness in Machine Learning, and Physical Unclonable Functions (PUFs) and Hardware Security.

Michael Wirthlin has contributed extensively to publications in well-known scientific venues. The most frequent publication venues include:

  • IEEE Transactions on Nuclear Science
  • ACM Transactions on Reconfigurable Technology and Systems
  • IEEE Transactions on Circuits and Systems I Regular Papers
  • Proceedings of the Python in Science Conferences

Their recent research output consists of several papers addressing topics such as the reliability of convolutional neural networks on FPGAs and radiation testing of soft processors. Selected recent papers include:

  • "Understanding the Impact of Quantization, Accuracy, and Radiation on the Reliability of Convolutional Neural Networks on FPGAs" (2020, IEEE Transactions on Nuclear Science)
  • "How Reduced Data Precision and Degree of Parallelism Impact the Reliability of Convolutional Neural Networks on FPGAs" (2021, IEEE Transactions on Nuclear Science)
  • "Neutron Radiation Testing of a TMR VexRiscv Soft Processor on SRAM-Based FPGAs" (2021, IEEE Transactions on Nuclear Science)
  • "Low Latency SEU Detection in FPGA CRAM With In-Memory ECC Checking" (2023, IEEE Transactions on Circuits and Systems I Regular Papers)
  • "Partial TMR for Improving the Soft Error Reliability of SRAM-Based FPGA Designs" (2021, IEEE Transactions on Nuclear Science)

Michael Wirthlin has collaborated frequently with several coauthors in their research, including:

  • Andrew Elbert Wilson
  • Corbin Thurlow
  • Andrew M. Keller
  • Nathan Baker
  • F. Libano

Best Publications

  • A dynamic instruction set computer

    M.J. Wirthlin;B.L. Hutchings

  • ACTOR-ORIENTED DESIGN OF EMBEDDED HARDWARE AND SOFTWARE SYSTEMS

    Edward A. Lee;Stephen Neuendorffer;Michael J. Wirthlin

  • Improving FPGA Design Robustness with Partial TMR

    B. Pratt;M. Caffrey;P. Graham;K. Morgan

  • A Comparison of TMR With Alternative Fault-Tolerant Design Techniques for FPGAs

    K.S. Morgan;D.L. McMurtrey;B.H. Pratt;M.J. Wirthlin

  • The Nano Processor: a low resource reconfigurable processor

    M.J. Wirthlin;B.L. Hutchings;K.L. Gilson

  • FPGA partial reconfiguration via configuration scrubbing

    Jonathan Heiner;Benjamin Sellers;Michael Wirthlin;Jeff Kalb

  • High-Reliability FPGA-Based Systems: Space, High-Energy Physics, and Beyond

    Michael Wirthlin

  • SRAM FPGA Reliability Analysis for Harsh Radiation Environments

    P.S. Ostler;M.P. Caffrey;D.S. Gibelyou;P.S. Graham

  • Implementation Approaches for Reconfigurable Logic Applications

    Brad Hutchings;Michael J. Wirthlin

  • The reliability of FPGA circuit designs in the presence of radiation induced configuration upsets

    M. Wirthlin;E. Johnson;N. Rollins;M. Caffrey

  • Improving functional density using run-time circuit reconfiguration [FPGAs]

    M.J. Wirthlin;B.L. Hutchings

  • DISC: the dynamic instruction set computer

    Michael J. Wirthlin;Brad L. Hutchings

  • SEU-induced persistent error propagation in FPGAs

    K. Morgan;M. Caffrey;P. Graham;E. Johnson

  • Fault Tolerant ICAP Controller for High-Reliable Internal Scrubbing

    J. Heiner;N. Collins;M. Wirthlin

  • Evaluating TMR Techniques in the Presence of Single Event Upsets

    Paul S. Graham;Nathaniel Rollins;Michael J. Wirthlin;Michael P. Caffrey

  • Accelerator validation of an FPGA SEU simulator

    E. Johnson;M. Caffrey;P. Graham;N. Rollins

  • Using Benchmarks for Radiation Testing of Microprocessors and FPGAs

    Heather Quinn;William H. Robinson;Paolo Rech;Miguel Aguirre

  • Dynamically-configurable digital processor using method for relocating logic array modules

    Michael J. Wirthlin;Brad L. Hutchings

  • Selective Hardening for Neural Networks in FPGAs

    F. Libano;B. Wilson;J. Anderson;M. J. Wirthlin

  • Sequencing Run-Time Reconfigured Hardware with Software

    Michael J. Wirthlin;Brad L. Hutchings

  • Dynamic reconfiguration for management of radiation-induced faults in FPGAs

    Maya Gokhale;Paul Graham;Michael Wirthlin;D. Eric Johnson

  • Single-Event Characterization of the 20 nm Xilinx Kintex UltraScale Field-Programmable Gate Array under Heavy Ion Irradiation

    David S. Lee;Gregory R. Allen;Gary Swift;Matthew Cannon

  • FPGA Pipeline Synthesis Design Exploration Using Module Selection and Resource Sharing

    W. Sun;M.J. Wirthlin;S. Neuendorffer

  • Fine-Grain SEU Mitigation for FPGAs Using Partial TMR

    B. Pratt;M. Caffrey;J.F. Carroll;P. Graham

Frequent Co-Authors

Brad Hutchings
Brad Hutchings Brigham Young University
Matteo Sonza Reorda
Matteo Sonza Reorda Polytechnic University of Turin
Robert A. Reed
Robert A. Reed Vanderbilt University
Lloyd W. Massengill
Lloyd W. Massengill Vanderbilt University
Bharat L. Bhuva
Bharat L. Bhuva Vanderbilt University
Paul E. Dodd
Paul E. Dodd Sandia National Laboratories
Marty R. Shaneyfelt
Marty R. Shaneyfelt Sandia National Laboratories
F.W. Sexton
F.W. Sexton Sandia National Laboratories
David G. Long
David G. Long Brigham Young University
Paul W. Marshall
Paul W. Marshall United States Naval Research Laboratory

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