Algorithm, Electronic engineering, Electronic circuit, Statistical static timing analysis and Static timing analysis are his primary areas of study. His studies deal with areas such as Upper and lower bounds, Spatial correlation, Monte Carlo method and Process variation as well as Algorithm. His Process variation study incorporates themes from Probability distribution and Statistics.
His Electronic engineering study integrates concerns from other disciplines, such as Industrial noise, Noise, Inductance, Voltage and Interconnection. His research in Statistical static timing analysis tackles topics such as Computation which are related to areas like Parameterized complexity. The concepts of his Static timing analysis study are interwoven with issues in Theoretical computer science, Random variable and Heuristic.
Vladimir Zolotov mostly deals with Electronic engineering, Algorithm, Static timing analysis, Electronic circuit and Integrated circuit. His Electronic engineering research includes elements of Interconnection, Chip and Noise. Vladimir Zolotov has included themes like Theoretical computer science, Random variable, Metric and Statistical static timing analysis in his Algorithm study.
His Random variable study integrates concerns from other disciplines, such as Time complexity and Upper and lower bounds. His work on Digital electronics as part of general Electronic circuit research is often related to RLC circuit, thus linking different fields of science. His research integrates issues of Statistical timing and Voltage in his study of Integrated circuit.
His scientific interests lie mostly in Algorithm, Integrated circuit, Static timing analysis, Electronic engineering and Statistical timing. The Integrated circuit study combines topics in areas such as Function, Parameterized complexity and Voltage. His Static timing analysis study combines topics in areas such as Logic gate and Sensitivity.
His research in Electronic engineering intersects with topics in Transistor, Process variation, Noise and Signal. His Process variation study incorporates themes from Field-effect transistor and Process variable. He interconnects Timing closure, Computer hardware and Mathematical optimization in the investigation of issues within Statistical timing.
Vladimir Zolotov spends much of his time researching Algorithm, Integrated circuit, Integrated circuit design, Mathematical optimization and Statistical static timing analysis. His studies in Algorithm integrate themes in fields like Selection algorithm and Random variable. His Integrated circuit research is multidisciplinary, incorporating elements of Closing, Bin, Statistical timing and Voltage.
His research ties Static timing analysis and Integrated circuit design together. His Mathematical optimization research incorporates themes from Metric, Time complexity, Order statistic, Independent and identically distributed random variables and Binary tree. Statistics and Electronic engineering are the two main areas of interest in his Statistical static timing analysis studies.
This overview was generated by a machine learning system which analysed the scientist’s body of work. If you have any feedback, you can contact us here.
Statistical Timing Analysis for Intra-Die Process Variations with Spatial Correlations
Aseem Agarwal;David Blaauw;Vladimir Zolotov.
international conference on computer aided design (2003)
Robust Extraction of Spatial Correlation
Jinjun Xiong;V. Zolotov;Lei He.
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (2007)
Method, system, and program product for computing a yield gradient from statistical timing
Chandramouli Visweswariah;JinJun Xiong;Vladimir Zolotov.
(2006)
Parameterized block-based statistical timing analysis with non-gaussian parameters, nonlinear delay functions
Hongliang Chang;Vladimir Zolotov;Sambasivan Narayan;Chandu Visweswariah.
design automation conference (2005)
Statistical timing analysis using bounds and selective enumeration
A. Agarwal;V. Zolotov;D.T. Blaauw.
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (2003)
Statistical delay computation considering spatial correlations
Aseem Agarwal;David Blaauw;Vladimir Zolotov;Savithri Sundareswaran.
asia and south pacific design automation conference (2003)
ClariNet: a noise analysis tool for deep submicron design
Rafi Levy;David Blaauw;Gabi Braca;Aurobindo Dasgupta.
design automation conference (2000)
Circuit optimization using statistical static timing analysis
Aseem Agarwal;Kaviraj Chopra;David Blaauw;Vladimir Zolotov.
design automation conference (2005)
Gate sizing using incremental parameterized statistical timing analysis
M. R. Guthaus;N. Venkateswarant;C. Visweswariaht;V. Zolotov.
international conference on computer aided design (2005)
Path-Based Statistical Timing Analysis Considering Inter- and Intra-Die Correlations
Aseem Agarwal;David Blaauw;Vladimir Zolotov;Savithri Sundareswaran.
ACM/IEEE International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems (2002)
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