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D-Index & Metrics

Electronics and Electrical Engineering

D-Index
55
Citations
10966
World Ranking
2197
National Ranking
856

Research.com Recognitions

  • 2016 - IEEE Fellow For contributions to low-power and energy-efficient design of digital circuits and systems

Overview

Sarma Vrudhula is affiliated with Arizona State University in the United States and has contributed extensively to the fields of engineering and computer science. Their research focuses on multiple subfields, including electrical and electronic engineering, computer vision and pattern recognition, artificial intelligence, hardware and architecture, and biomedical engineering.

The scientist's work covers a broad range of topics, notably advanced memory and neural computing, advanced neural network applications, ferroelectric and negative capacitance devices, advancements in semiconductor devices and circuit design, CCD and CMOS imaging sensors, semiconductor materials and devices, and parallel computing and optimization techniques.

Some of the recent papers by Sarma Vrudhula include the following:

  • ELSA, 2020, ACM Transactions on Embedded Computing Systems
  • A Novel ASIC Design Flow Using Weight-Tunable Binary Neurons as Standard Cells, 2022, IEEE Transactions on Circuits and Systems I Regular Papers
  • Heterogeneous FPGA Architecture Using Threshold Logic Gates for Improved Area, Power, and Performance, 2021, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
  • A Flash-based Current-mode IC to Realize Quantized Neural Networks, 2022, 2022 Design, Automation & Test in Europe Conference & Exhibition (DATE)
  • EdgeWise: Energy-efficient CNN Computation on Edge Devices under Stochastic Communication Delays, 2022, ACM Transactions on Embedded Computing Systems

Frequent co-authors collaborating with Sarma Vrudhula include:

  • Ankit Wagle
  • Gian Singh
  • Sunil P. Khatri
  • Mehdi Ghasemi
  • Carole-Jean Wu

Publishing venues often chosen by Sarma Vrudhula for disseminating research comprise:

  • arXiv (Cornell University)
  • IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
  • ACM Transactions on Embedded Computing Systems
  • IEEE Transactions on Circuits and Systems I Regular Papers
  • IEEE Transactions on Computers

In recognition of contributions to the field, Sarma Vrudhula was honored as an IEEE Fellow in 2016 for work related to low-power and energy-efficient design of digital circuits and systems.

Best Publications

  • Throughput-Optimized OpenCL-based FPGA Accelerator for Large-Scale Convolutional Neural Networks

    Naveen Suda;Vikas Chandra;Ganesh Dasika;Abinash Mohanty

  • Battery modeling for energy aware system design

    R. Rao;S. Vrudhula;D.N. Rakhmatov

  • Predictive Modeling of the NBTI Effect for Reliable Design

    S. Bhardwaj;Wenping Wang;R. Vattikonda;Y. Cao

  • Optimizing Loop Operation and Dataflow in FPGA Acceleration of Deep Convolutional Neural Networks

    Yufei Ma;Yu Cao;Sarma Vrudhula;Jae-sun Seo

  • An analytical high-level battery model for use in energy management of portable electronic systems

    Daler N. Rakhmatov;Sarma B. K. Vrudhula

  • The Impact of NBTI Effect on Combinational Circuit: Modeling, Simulation, and Analysis

    Wenping Wang;Shengqi Yang;S. Bhardwaj;S. Vrudhula

  • Energy management for battery-powered embedded systems

    Daler Rakhmatov;Sarma Vrudhula

  • Optimizing the Convolution Operation to Accelerate Deep Neural Networks on FPGA

    Yufei Ma;Yu Cao;Sarma Vrudhula;Jae-sun Seo

  • A model for battery lifetime analysis for organizing applications on a pocket computer

    D. Rakhmatov;S. Vrudhula;D.A. Wallach

  • The impact of NBTI on the performance of combinational and sequential circuits

    Wenping Wang;Shengqi Yang;Sarvesh Bhardwaj;Rakesh Vattikonda

  • BDD Based Decomposition of Logic Functions with Application to FPGA Synthesis

    Yung-Te Lai;Massoud Pedram;Sarma B. K. Vrudhula

  • Scalable and modularized RTL compilation of Convolutional Neural Networks onto FPGA

    Yufei Ma;Naveen Suda;Yu Cao;Jae-sun Seo

  • EVBDD-based algorithms for integer linear programming, spectral transformation, and function decomposition

    Y.-T. Lai;M. Pedram;S.B.K. Vrudhula

  • EPIMap: using epimorphism to map applications on CGRAs

    Mahdi Hamzeh;Aviral Shrivastava;Sarma Vrudhula

  • Fully parallel write/read in resistive synaptic array for accelerating on-chip learning.

    Ligang Gao;I-Ting Wang;Pai-Yu Chen;Sarma Vrudhula

  • Energy-Efficient Operation of Multicore Processors by DVFS, Task Migration, and Active Cooling

    Vinay Hanumaiah;Sarma Vrudhula

  • Power balanced coverage-time optimization for clustered wireless sensor networks

    Tao Shu;Marwan Krunz;Sarma Vrudhula

  • Mitigating Effects of Non-ideal Synaptic Device Characteristics for On-chip Learning

    Pai-Yu Chen;Binbin Lin;I-Ting Wang;Tuo-Hung Hou

  • An automatic RTL compiler for high-throughput FPGA implementation of diverse deep convolutional neural networks

    Yufei Ma;Yu Cao;Sarma Vrudhula;Jae-sun Seo

  • Static power optimization of deep submicron CMOS circuits for dual V/sub T/ technology

    Qi Wang;Sarma B. K. Vrudhula

Frequent Co-Authors

Yu Cao
Yu Cao University of Minnesota
David Blaauw
David Blaauw University of Michigan–Ann Arbor
Shimeng Yu
Shimeng Yu Georgia Institute of Technology
Chaitali Chakrabarti
Chaitali Chakrabarti Arizona State University
Pai-Yu Chen
Pai-Yu Chen Arizona State University
Naehyuck Chang
Naehyuck Chang Korea Advanced Institute of Science and Technology
Hugh J. Barnaby
Hugh J. Barnaby Arizona State University
Michael N. Kozicki
Michael N. Kozicki Arizona State University
Massoud Pedram
Massoud Pedram University of Southern California
Marwan Krunz
Marwan Krunz University of Arizona

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