World's Best Scientists 2026 revealed!
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Rising Stars
2025

D-Index & Metrics

Rising Stars

D-Index
33
Citations
5792
World Ranking
914
National Ranking
149

Electronics and Electrical Engineering

D-Index
31
Citations
6165
World Ranking
6462
National Ranking
2116

Research.com Recognitions

  • 2025 - Research.com Rising Stars Award

Overview

Pai-Yu Chen is affiliated with Arizona State University in the United States. Their academic profile currently does not list specific publications, co-authors, or detailed research topics. Despite the absence of publicly noted recent papers or book publications, their connection with a major research institution suggests engagement in scholarly activities.

Currently, there are no listed frequent publication venues associated with Pai-Yu Chen, indicating that detailed information about favored journals or conferences is not available at this time.

Similarly, there is no data on the primary or subfields of study. This lack of explicit categorization may reflect a broad or emerging research focus or an incomplete public record of their academic output.

Their profile does not include information on main research topics, which implies that specific areas of expertise or thematic concentration have not been documented in the available data.

There are no recorded awards or honors for Pai-Yu Chen in the provided information, which may suggest either an early stage in their career or that such recognitions are not publicly documented.

Best Publications

  • SiGe epitaxial memory for neuromorphic computing with reproducible high performance based on engineered dislocations

    Shinhyun Choi;Scott H. Tan;Zefan Li;Yunjo Kim

  • NeuroSim: A Circuit-Level Macro Model for Benchmarking Neuro-Inspired Architectures in Online Learning

    Pai-Yu Chen;Xiaochen Peng;Shimeng Yu

  • Emerging Memory Technologies: Recent Trends and Prospects

    Shimeng Yu;Pai-Yu Chen

  • Ferroelectric FET analog synapse for acceleration of deep neural network training

    Matthew Jerry;Pai-Yu Chen;Jianchi Zhang;Pankaj Sharma

  • NeuroSim+: An integrated device-to-algorithm framework for benchmarking synaptic devices and array architectures

    Pai-Yu Chen;Xiaochen Peng;Shimeng Yu

  • Compact Modeling of RRAM Devices and Its Applications in 1T1R and 1S1R Array Design

    Pai-Yu Chen;Shimeng Yu

  • A 65nm 4Kb algorithm-dependent computing-in-memory SRAM unit-macro with 2.3ns and 55.8TOPS/W fully parallel product-sum operation for binary DNN edge processors

    Win-San Khwa;Jia-Jing Chen;Jia-Fang Li;Xin Si

  • Binary neural network with 16 Mb RRAM macro chip for classification and online training

    Shimeng Yu;Zhiwei Li;Pai-Yu Chen;Huaqiang Wu

  • Scaling-up resistive synaptic arrays for neuro-inspired architecture: Challenges and prospect

    Shimeng Yu;Pai-Yu Chen;Yu Cao;Lixue Xia

  • MNSIM: Simulation Platform for Memristor-Based Neuromorphic Computing System

    Lixue Xia;Boxun Li;Tianqi Tang;Peng Gu

  • Demonstration of Convolution Kernel Operation on Resistive Cross-Point Array

    Ligang Gao;Pai-Yu Chen;Shimeng Yu

  • NbOx based oscillation neuron for neuromorphic computing

    Ligang Gao;Pai Yu Chen;Shimeng Yu

  • Fully parallel write/read in resistive synaptic array for accelerating on-chip learning.

    Ligang Gao;I-Ting Wang;Pai-Yu Chen;Sarma Vrudhula

  • Mitigating Effects of Non-ideal Synaptic Device Characteristics for On-chip Learning

    Pai-Yu Chen;Binbin Lin;I-Ting Wang;Tuo-Hung Hou

  • Device and materials requirements for neuromorphic computing

    Raisul Islam;Haitong Li;Pai-Yu Chen;Weier Wan

  • A ferroelectric field effect transistor based synaptic weight cell

    Matthew Jerry;Sourav Dutta;Arman Kazemi;Kai Ni

  • MNSIM: Simulation platform for memristor-based neuromorphic computing system

    Lixue Xia;Boxun Li;Tianqi Tang;Peng Gu

  • Programming Protocol Optimization for Analog Weight Tuning in Resistive Memories

    Ligang Gao;Pai-Yu Chen;Shimeng Yu

  • Understanding the resistive switching characteristics and mechanism in active SiOx-based resistive switching memory

    Yao-Feng Chang;Pai-Yu Chen;Burt Fowler;Yen-Ting Chen

  • Technology-design co-optimization of resistive cross-point array for accelerating learning algorithms on chip

    Pai-Yu Chen;Deepak Kadetotad;Zihan Xu;Abinash Mohanty

  • Physical Unclonable Function Exploiting Sneak Paths in Resistive Cross-point Array

    Ligang Gao;Pai-Yu Chen;Rui Liu;Shimeng Yu

Frequent Co-Authors

Shimeng Yu
Shimeng Yu Georgia Institute of Technology
Yu Cao
Yu Cao University of Minnesota
Sarma Vrudhula
Sarma Vrudhula Arizona State University
Yao-Feng Chang
Yao-Feng Chang The University of Texas at Austin
Jack C. Lee
Jack C. Lee The University of Texas at Austin
Yuan Xie
Yuan Xie Hong Kong University of Science and Technology
Suman Datta
Suman Datta Georgia Institute of Technology
Huaqiang Wu
Huaqiang Wu Tsinghua University
Chaitali Chakrabarti
Chaitali Chakrabarti Arizona State University
Swarup Bhunia
Swarup Bhunia University of Florida

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