Fatih Hamzaoglu

Fatih Hamzaoglu publication distribution in Electronics and Electrical Engineering in 2026

The chart shows the distribution of publications by all Research.com ranked scientists in the field of Electronics and Electrical Engineering in 2026. The highlighted bar marks where Fatih Hamzaoglu sits on this spectrum.

Fatih Hamzaoglu D-index placement in Electronics and Electrical Engineering in 2026

The chart shows the D-index (discipline H-index) distribution of Electronics and Electrical Engineering scientists ranked by Research.com in 2026. The highlighted bar marks where Fatih Hamzaoglu sits on this spectrum.

Overview

Best Publications

• A 3-GHz 70-mb SRAM in 65-nm CMOS technology with integrated column-based dynamic power supply

  Kevin Zhang;U. Bhattacharya;Zhanping Chen;F. Hamzaoglu

  529
  Citations

• SRAM design on 65-nm CMOS technology with dynamic sleep transistor for leakage reduction

  K. Zhang;U. Bhattacharya;Zhanping Chen;F. Hamzaoglu

  299
  Citations

• A 4.6GHz 162Mb SRAM design in 22nm tri-gate CMOS technology with integrated active V MIN -enhancing assist circuitry

  Eric Karl;Yih Wang;Yong-Gee Ng;Zheng Guo

  221
  Citations

• Circuit-level techniques to control gate leakage for sub-100 nm CMOS

  Fatih Hamzaoglu;Mircea R. Stan

  189
  Citations

• 13.2 A 3.6Mb 10.1Mb/mm 2 Embedded Non-Volatile ReRAM Macro in 22nm FinFET Technology with Adaptive Forming/Set/Reset Schemes Yielding Down to 0.5V with Sensing Time of 5ns at 0.7V

  Pulkit Jain;Umut Arslan;Meenakshi Sekhar;Blake C. Lin

  154
  Citations

• MRAM as Embedded Non-Volatile Memory Solution for 22FFL FinFET Technology

  O. Golonzka;J. G. Alzate;U. Arslan;M. Bohr

  153
  Citations

• 13.3 A 7Mb STT-MRAM in 22FFL FinFET Technology with 4ns Read Sensing Time at 0.9V Using Write-Verify-Write Scheme and Offset-Cancellation Sensing Technique

  Liqiong Wei;Juan G. Alzate;Umut Arslan;Justin Brockman

  149
  Citations

• A 1.1 GHz 12 $\mu$ A/Mb-Leakage SRAM Design in 65 nm Ultra-Low-Power CMOS Technology With Integrated Leakage Reduction for Mobile Applications

  Yih Wang;Hong Jo Ahn;U. Bhattacharya;Zhanping Chen

  141
  Citations

• 16.2 eDRAM-CIM: Compute-In-Memory Design with Reconfigurable Embedded-Dynamic-Memory Array Realizing Adaptive Data Converters and Charge-Domain Computing

  Shanshan Xie;Can Ni;Aseem Sayal;Pulkit Jain

  133
  Citations

• Multi-Phase 1 GHz Voltage Doubler Charge Pump in 32 nm Logic Process

  D. Somasekhar;B. Srinivasan;G. Pandya;F. Hamzaoglu

  127
  Citations

• Dual-V/sub T/ SRAM cells with full-swing single-ended bit line sensing for high-performance on-chip cache in 0.13 /spl mu/m technology generation

  Fatih Hamzaoglu;Yibin Te;Ali Keshavarzi;Kevin Zhang

  100
  Citations

• SRAM design on 65nm CMOS technology with integrated leakage reduction scheme

  K. Zhang;U. Bhattacharya;Z. Chen;F. Hamzaoglu

  99
  Citations

• A 3.8 GHz 153 Mb SRAM Design With Dynamic Stability Enhancement and Leakage Reduction in 45 nm High-k Metal Gate CMOS Technology

  F. Hamzaoglu;K. Zhang;Yih Wang;H.J. Ahn

  86
  Citations

• A 3-GHz 70MB SRAM in 65nm CMOS technology with integrated column-based dynamic power supply

  Unknown

  86
  Citations

• 2 MB Array-Level Demonstration of STT-MRAM Process and Performance Towards L4 Cache Applications

  J.G. Alzate;P. Hentges;R. Jahan;A. Littlejohn

  85
  Citations

• A 4.0 GHz 291Mb voltage-scalable SRAM design in 32nm high-κ metal-gate CMOS with integrated power management

  Y. Wang;U. Bhattacharya;F. Hamzaoglu;P. Kolar

  82
  Citations

• A 4.6 GHz 162 Mb SRAM Design in 22 nm Tri-Gate CMOS Technology With Integrated Read and Write Assist Circuitry

  E. Karl;Yih Wang;Yong-Gee Ng;Zheng Guo

  78
  Citations

• A 32 nm High-k Metal Gate SRAM With Adaptive Dynamic Stability Enhancement for Low-Voltage Operation

  Hyunwoo Nho;Pramod Kolar;Fatih Hamzaoglu;Yih Wang

  78
  Citations

• A 256-Kb Dual- ${V}_{ m CC}$ SRAM Building Block in 65-nm CMOS Process With Actively Clamped Sleep Transistor

  M. Khellah;D. Somasekhar;Y. Ye;Nam Sung Kim

  74
  Citations

• Analysis of dual-V/sub T/ SRAM cells with full-swing single-ended bit line sensing for on-chip cache

  F. Hamzaoglu;Y. Ye;A. Keshavarzi;K. Zhang

  66
  Citations

• Non-Volatile RRAM Embedded into 22FFL FinFET Technology

  O. Golonzka;U. Arslan;P. Bai;M. Bohr

  66
  Citations

• A 1.1 GHz 12 μA/Mb-Leakage SRAM Design in 65 nm Ultra-Low-Power CMOS Technology With Integrated Leakage Reduction for Mobile Applications

  Yih Wang;Hong Jo Ahn;Uddalak Bhattacharya;Zhanping Chen

  19
  Citations